Back to results
US 11,442,795 B2Granted
Convergence among concurrently executing threads
AssigneeNVIDIA Corporation
InventorsDaniel Robert Johnson, Jack Choquette, Oliver Giroux, Michael Patrick McKeown, Mark Stephenson, Sana Damani
Life of this patent
Estimating the term…
Abstract
Convergence of threads executing common code sections is facilitated using instructions inserted at strategic locations in computer code sections. The inserted instructions enable the threads in a warp or other group to cooperate with a thread scheduler to promote thread convergence.
Claims19
A system comprising:
- a code profiler configured to insert instructions into a code segment to:
- predict an eventual arrival of a thread executing the code segment at an execution barrier in the code segment;
- confirm the thread reached the execution barrier;
- cancel the predicted arrival of the thread at the execution barrier in a branch of the code segment that will not encounter the execution barrier;
- and
- a thread scheduler configured to:
- execute in parallel multiple threads comprising the code segment, each of the multiple threads comprising the instructions inserted by the code profiler;
- and
- suspend execution of threads arriving at the execution barrier while more of the multiple threads are predicted to arrive at the execution barrier.
6 more elements
A method for promoting thread convergence comprising:
- defining and inserting a convergence point of an execution barrier in a common section of code executed b a branch of the code;
- predicting that a plurality of threads will arrive at the convergence point to execute the common section of the code;
- canceling the predicted arrival of a first one or more of the threads at the convergence point in the branch of the code that will not execute to the convergence point;
- and
- delaying execution of a second one or more of the threads at the convergence point until a number of the threads that have not canceled their predicted arrival at the convergence point arrive at the convergence point or cancel theft arrival at the convergence point.
2 more elements
An apparatus comprising:
- one or more processors;
- a memory comprising instructions that when executed by the one or more processors result in:
- analyzing program code and determining a common code segment to execute in parallel as a plurality of threads, and a divergent code segment;
- identifying synchronization point of the plurality of threads;
- inserting, into the common code segment an instruction to set a convergence barrier based on the synchronization point;
- inserting, into the common code segment, an instruction to join the convergence barrier;
- inserting, into time divergent code segment of the threads, an instruction to cancel the join to the convergence barrier, the instruction to cancel the join to the convergence barrier being independent from other instruction to join a different convergence barrier;
- and
- executing the program code with the inserted instructions to promote thread convergence by cooperating with a thread scheduler.
6 more elements
Dependencies are inferred from the claim text.