Method for executing a machine code of a secure function

A non-transitory computer-readable storage medium storing computer-readable machine code of a secure function, which, when executed by a microprocessor, causes the microprocessor to perform an execution method, the method comprising:

• a) supplying the machine code, the machine code comprising a succession of basic blocks, wherein
• each basic block comprises a succession of instructions systematically executed one after another upon execution of the machine code by the microprocessor, at least some of the instructions to be protected, and
• each basic block begins at a branch address and ends with a branch instruction to a branch address of another basic block, the basic block which begins at the branch address being called “next basic block” and a basic block which ends with a branch instruction to the branch address being called “preceding basic block”,
• b) upon the execution of the machine code by the microprocessor,
• 1) loading and decoding, by the microprocessor, the instructions of the preceding and next basic blocks of the machine code, then executing each decoded instruction by an arithmetic and logic unit of the microprocessor,
• 2) each time an instruction to be protected of the preceding basic block is loaded, constructing, by a hardware securing module of the microprocessor, using a preprogrammed function Fcs( ), a new value of a signature from a value of the instruction to be protected and from a preceding value of the signature, the signature being a function of values of different instructions to be protected of the preceding basic block,
• 3) loading, by the microprocessor, an initialization vector contained in the machine code and calculating, by the hardware securing module, from the loaded initialization vector and using a preprogrammed function FVs( ), an expected value for a signature of the preceding basic block,
• 4) in response to loading of a predetermined instruction, comparing, by the hardware securing module, the constructed new value of the signature to the expected value of the signature calculated from the loaded initialization vector, and
• 5) only if the compared values do not correspond, triggering, by the hardware securing module, signaling of a fault upon the execution of the machine code and, otherwise, inhibiting the signaling,
• wherein the initialization vector is only contained in the next basic block.

An electronic device, comprising:

• a memory in which is stored a machine code of a secure function, the machine code comprising a succession of basic blocks, wherein
• each basic block comprises a succession of instructions systematically executed one after another upon execution of the machine code by a microprocessor, at least some of the instructions to be protected, and
• each basic block begins at a branch address and ends with a branch instruction to a branch address of another basic block, the basic block which begins at the branch address being called “next basic block” and a basic block which ends with a branch instruction to the branch address being called “preceding basic block”;
• and
• the microprocessor comprising an arithmetic and logic unit and a hardware securing module, the microprocessor being configured to execute the machine code stored in the memory, the microprocessor being configured, upon the execution of the machine code, to load and decode the instructions of the preceding and next basic blocks of the machine code, and the arithmetic and logic unit is configured to execute each decoded instruction, wherein
• the hardware securing module is configured, upon the execution of the machine code, to perform:
• constructing, each time an instruction to be protected of the preceding basic block is loaded, using a preprogrammed function Fcs( ), a new value of a signature from a value of the instruction to be protected and from a preceding value of the signature, the signature being a function of values of different instructions to be protected of the preceding basic block,
• calculating, each time the microprocessor loads an initialization vector contained in the machine code, from the loaded initialization vector and using a preprogrammed function Fcs( ), an expected value for a signature of the preceding basic block,
• comparing, in response to loading of a predetermined instruction, the constructed new value of the signature to the expected value of the signature calculated from the loaded initialization vector, and
• triggering, only if the compared values do not correspond, the signaling of a fault upon the execution of the machine code and, otherwise, inhibits such signaling,
• wherein the initialization vector is only contained in the next basic block.