Voltage based combining of block families for memory devices
AssigneeMicron Technology, Inc.
InventorsMichael Sheperek, Kishore Kumar Muchherla, Shane Nowell
Life of this patent
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AssigneeMicron Technology, Inc.
InventorsMichael Sheperek, Kishore Kumar Muchherla, Shane Nowell
Estimating the term…
An example memory sub-system includes a memory device and a processing device, operatively coupled to the memory device. The processing device is configured to create a first block family comprising a first set of blocks that have been programmed within at least one of a first specified time window or a first specified temperature window, wherein each block associated with the first block family is associated with a first set of read level offsets; create, a second block family comprising a second set of blocks that have been programmed within at least one of a second specified time window following the first specified time window or a second specified temperature window, wherein each block associated with the second block family is associated with a second set of read level offsets; and responsive to a determining that a threshold criterion is satisfied, combine the first and second block family.
A system comprising:
A method comprising:
A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device operatively coupled to a memory device, perform operations comprising:
Dependencies are inferred from the claim text.