On-chip passive power supply compensation circuit and operation unit, chip, hash board and computing device using same

An on-chip passive power supply compensation circuit, comprising:

• two or more to-be-powered voltage domains, wherein the to-be-powered voltage domains are connected in series between a power supply and ground;
• and
• two or more isolation regions, wherein the to-be-powered voltage domains are formed in the isolation regions, and the isolation regions are configured for isolating the to-be-powered voltage domains;
• the isolation regions are connected in series between the power supply and the ground;
• wherein the on-chip passive power supply compensation circuit further comprises power supply compensation units connected between the to-be-powered voltage domains and the isolation regions for providing power supply compensation to the to-be-powered voltage domains;
• wherein a first power supply end and a first ground end are formed at both ends of each of the isolation regions, and the first power supply end and/or the first ground end are configured for supplying a reference voltage to the power supply compensation units;
• a second power supply end and a second ground end are formed at both ends of each of the to-be-powered voltage domains, and the power supply compensation units provide power supply compensation to the second power supply end and/or the second ground end.