Pipette type patch clamp, measuring device having the patch clamp, and method of manufacturing the patch clamp

A patch clamp, comprising:

• a puller having a through region with a predetermined length such that an object is sucked therethrough;
• a silicon wafer configured to support the puller;
• an insulating layer disposed on a surface of the silicon wafer and a surface of the puller;
• and
• an electrode layer disposed on a surface of the insulating layer to connect to a first fluid channel disposed on the top of the patch clamp and a second fluid channel disposed on the bottom of the patch clamp,
• wherein the puller is formed in a shape of a pipette through a plurality of reflow processes, and wherein a width of a top part of the puller is less than a width of a bottom part of the puller.

A method of manufacturing a patch clamp, the method comprising:

• a first step of etching a peripheral region of a first type filler while leaving the first type filler in a silicon wafer in a downward direction from a top surface of the silicon wafer;
• a second step of bonding a glass wafer to the top surface of the silicon wafer;
• a third step of forming a first type puller by filling the peripheral region etched in the first step with glass through a reflow process of the glass wafer, wherein the filler of the silicon wafer is positioned at a center of the first type puller;
• a fourth step of etching a peripheral region of the puller in the silicon wafer, after removing the glass wafer present on the top surface of the silicon wafer;
• a fifth step of forming a second type puller from the first type puller by additionally performing a reflow of glass on the first type puller;
• a sixth step of etching the filler of the silicon wafer positioned at a center of the second type puller;
• a seventh step of etching in an upward direction from a bottom surface of the silicon wafer to the bottom of the second type puller;
• an eighth step of disposing an insulating layer on the top surface of the silicon wafer, the bottom surface of the silicon wafer, and a surface of the second type puller;
• and
• a ninth step of disposing an electrode layer on a surface of the insulating layer.