Efficient retention flop utilizing different voltage domain

A method, comprising:

• receiving, by a source terminal of a first p-type device, a first power supply voltage;
• conveying, by a drain terminal of the first p-type device, a first voltage level based on the first power supply voltage;
• receiving, by a source terminal of a second p-type device, the first voltage level;
• receiving, by a gate terminal of the second p-type device, a data signal based on a second power supply voltage different from the first power supply voltage;
• receiving, by a source terminal of a third p-type device, the first voltage level;
• receiving, by a gate terminal of the third p-type device, a clock signal based on the second power supply voltage;
• conveying, by each of the drain terminals of the second p-type device and the third p-type device, a second voltage level;
• receiving, by a drain terminal of a first n-type device, the second voltage level;
• receiving, by a source terminal of the first n-type device, a ground reference level;
• and
• retaining the second voltage level based on the first power supply voltage, in response to detecting that the second power supply voltage transitions to the ground reference level.

A data retention flip-flop circuit comprising:

• a master latch configured to:
• receive a first power supply voltage;
• receive a data signal based on a second power supply voltage different from the first power supply voltage;
• receive a clock signal based on the second power supply voltage;
• and
• convey at least one latch output;
• and
• a slave latch configured to receive the at least one latch output;
• and
• wherein the master latch comprises:
• a first device of a first device type configured to receive, on a first type of terminal, a first power supply voltage;
• a second device of the first device type configured to:
• receive, on the first type of terminal of the second device, a first voltage level on a second type of terminal of the first device;
• and
• receive, on a third type of terminal of the second device, a data signal based on a second power supply voltage different from the first power supply voltage;
• and
• a third device of the first device type configured to:
• receive, on the first type of terminal of the third device, the first voltage level;
• and
• receive, on the third type of terminal of the third device, a clock signal based on the second power supply voltage;
• and
• a first device of a second device type different from the first device type configured to:
• receive, on a second type of terminal of the first device of the second device type, a second voltage level on each of the second type of terminals of the second device and the third device;
• and
• receive, on a source terminal, a ground reference level;
• and
• wherein the second voltage level is retained based on the first power supply voltage, in response to detecting that the second power supply voltage transitions to the ground reference level.