Directed acyclic graph template for data pipeline
AssigneeMegh Computing, Inc.
InventorsSuchit Subhaschandra, Jonathan Beare, Duncan Moss
Life of this patent
Estimating the term…
Loading patent…
AssigneeMegh Computing, Inc.
InventorsSuchit Subhaschandra, Jonathan Beare, Duncan Moss
Estimating the term…
A computing system is provided, including a processor configured to receive a directed acyclic graph (DAG) template specifying a data pipeline of a plurality of processing stages. For each processing stage, the processor may be further configured to select a respective processing device of a plurality of communicatively linked processing devices. The processor may be further configured to determine a routing sequence between the plurality of processing devices according to the DAG template. The processor may be further configured to transmit a plurality of input packets encoding the plurality of processing stages to the respective processing devices selected for the processing stages as specified by the routing sequence. In response to transmitting the plurality of input packets, the processor may be further configured to receive, from a processing device of the plurality of processing devices, one or more output packets encoding a processing result of the data pipeline.
A computing system comprising:
A method for use with a computing system, the method comprising:
A computing system comprising:
Dependencies are inferred from the claim text.