Trusted field programmable gate array
AssigneeInternational Business Machines Corporation
InventorsJean-Olivier Plouchart, Arvind Kumar, Dirk Pfeiffer, Takashi Ando
Life of this patent
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Abstract
An approach to creating a tamper-resistant field programmable gate array (FPGA) and remotely reprogramming the tamper-resistant FPGA. In one aspect, determining if an encryption key is stored in a physical unclonable function (PUF) of the FPGA. Further, responsive to the encryption key not being stored in a PUF, writing an encryption key in tamper resistant memory associated with a back end of the line (BEOL) of the FPGA. In another aspect, writing a program key and a look-up table (LUT) in the tamper resistant memory.
Claims20
A computer-implemented method for creating a tamper-resistant field programmable gate array (FPGA), the computer-implemented method comprising:
- determining, by one or more processors, if an encryption key is stored in a physical unclonable function (PUF) of the FPGA;
- responsive to the encryption key not being stored in a PUF, writing, by the one or more processors, an encryption key in tamper resistant memory associated with a back end of the line (BEOL) of the FPGA;
- writing, by the one or more processors, a program key in the tamper resistant memory;
- and
- writing, by the one or more processors, a look-up table (LUT) in the tamper resistant memory.
A computer-implemented method for tamper resistant remote reprogramming of a field programmable gate array (FPGA), the computer-implemented method comprising:
- receiving, by one or more processors, a reprogramming request from a remote FPGA;
- generating, by the one or more processors, a random initialization vector;
- encrypting, by the one or more processors, a programming key and a bit file with an encryption key shared with the remote FPGA;
- and
- sending, by the one or more processors, the random initialization vector, the encrypted programming key and the encrypted bit file to the FPGA.
A computer system for creating a tamper-resistant field programmable gate array (FPGA), the computer system comprising:
- one or more computer processors;
- one or more computer readable storage media;
- and
- program instructions stored on the one or more computer readable storage media for execution by at least one of the one or more processors, the program instructions comprising:
- program instructions to determine if an encryption key is stored in a physical unclonable function (PUF) of the FPGA;
- responsive to the encryption key not being stored in a PUF, program instructions to write an encryption key in tamper resistant memory associated with a back end of the line (BEOL) of the FPGA;
- program instructions to write a program key in the tamper resistant memory;
- and
- program instructions to write a look-up table (LUT) in the tamper resistant memory.
Dependencies are inferred from the claim text.