Average interval generator
AssigneeMicron Technology, Inc.
InventorHidekazu Noguchi
Life of this patent
Estimating the term…
Abstract
Disclosed herein is an apparatus that includes a first circuit configured to generate a first signal a first number of times in response to an input signal, a second circuit configured to generate a second signal having a second numerical value each time the first signal is activated, and a third circuit configured to receive the second signal to update a count value obtained by accumulating the second numerical value, configured to generate a third signal each time the count value reaches a third numerical value, and configured to update the count value obtained by accumulating the second numerical value and subtracting the third numerical value when the count value reached the third numerical value.
Claims20
An apparatus comprising:
- a first circuit configured to generate a first signal a first numerical value of times in response to an input signal;
- a second circuit configured to generate a second signal having a second numerical value each time the first signal is activated;
- and
- a third circuit configured to receive the second signal to update a count value obtained by accumulating the second numerical value, configured to generate a third signal each time the count value reaches a third numerical value, and configured to update the count value obtained by accumulating the second numerical value and subtracting the third numerical value when the count value reached the third numerical value.
An apparatus comprising:
- a pulse generator configured to generate a first pulse signal a first number of times in response to an input signal;
- a first counter circuit configured to update a first count value each time the first pulse signal is activated and configured to generate a second pulse signal and to reset the first count value to an initial value each time the first count value reaches a first predetermined value;
- and
- a second counter circuit configured to update a second count value each time the second pulse signal is activated and configured to generate a third pulse signal and to reset the second count value to an initial value each time the second count value reaches a second predetermined value,
- wherein the first number and at least of one the first and second predetermined values are indivisible by each other.
An apparatus comprising:
- an output circuit configured to generate a first signal indicating a first numeral value and a second signal indicating a second numeral value;
- a first adder circuit configured to update a first count value by accumulating the first numerical value each time a first pulse signal is activated and configured to generate a carrier signal and to reset the first count value to an initial value each time the first count value reaches a first predetermined value, and
- a second adder circuit configured to update a second count value by accumulating the second numerical value each time the first pulse signal is activated, configured to increment the second count vale in response to the carrier signal, and configured to generate a second pulse signal and to reset the second count value to an initial value each time the second count value reaches a second predetermined value.
Dependencies are inferred from the claim text.