Three-dimensional (3D) integrated circuit (IC) integration of an embedded chip and a preformed metal routing structure

A method for fabricating stacked dies within an integrated circuit (IC) package, comprising:

• encapsulating a first die in a package substrate layer having a first surface and a second surface, opposite the first surface;
• forming through vias in the package substrate layer;
• forming a metallization structure on the second surface of the package substrate layer;
• bonding a second die to the first surface of the package substrate layer;
• directly bonding a surface of the second die to a surface of the first die;
• and
• forming package bumps on a surface of the metallization structure, opposite the package substrate layer, to contact pads of the second die through metal routing layers of the metallization structure.

An integrated circuit (IC) package, comprising:

• a metallization structure;
• means for storing data in a package substrate layer, having a first surface and a second surface, opposite the first surface, the second surface of the package substrate layer on the metallization structure, in which the package substrate layer comprises a mold layer, comprising a spin-on oxide;
• an active die on the first surface of the package substrate layer and on the data storing means;
• through vias in the package substrate layer to couple pads of the active die to metal routing layers at a first surface of the metallization structure;
• and
• package bumps on a second surface of the metallization structure, opposite the first surface, and coupled to the pads of the active die through the metal routing layers.