Parallel channel skew for enhanced error correction
AssigneeCredo Technology Group Limited
InventorsJunqing Sun, Haoli Qian
Life of this patent
Estimating the term…
Loading patent…
AssigneeCredo Technology Group Limited
InventorsJunqing Sun, Haoli Qian
Estimating the term…
Digital communication transmitters, systems, and methods can introduce skew into parallel transmission channels to enhance the performance of forward error correction (FEC) decoders. One illustrative serializer-deserializer (SerDes) transmitter embodiment includes: a block code encoder configured to convert a sequence of input data blocks into a sequence of encoded data blocks; a demultiplexer configured to distribute code symbols from the sequence of encoded data blocks to multiple lanes in a cyclical fashion, the multiple lanes corresponding to parallel transmission channels; a skewer configured to buffer the multiple lanes to provide respective lane delays, the lane delays differing from each other by no less than half an encoded data block period; and multiple drivers, each driver configured to transmit code symbols from one of said multiple lanes on a respective one of said parallel transmission channels.
An active cable that comprises electrical conductors joining a first transceiver to a second transceiver to provide parallel transmission channels therebetween, each of the first and second transceivers including:
A SerDes transmitter that comprises:
A digital communication method that comprises:
Dependencies are inferred from the claim text.