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US 11,309,895 B2Granted
Systems and methods for implementing a scalable system
AssigneeApple Inc.
InventorsSanjay Dabral, Bahattin Kilic, Jie-Hua Zhao, Kunzhong Hu, Suk-Kyu Ryu
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Abstract
Multi-chip systems and structures for modular scaling are described. In some embodiments an interfacing bar is utilized to couple adjacent chips. For example, a communication bar may utilized to coupled logic chips, and memory bar may be utilized to couple multiple memory chips to a logic chip.
Claims18
A package on package structure:
- a lower redistribution layer (RDL);
- a first molding layer on the lower RDL;
- an interfacing bar encapsulated in the first molding layer;
- a second RDL over the first molding layer;
- a first chip on top of the second RDL;
- a package including a plurality of stacked chips on top of the second RDL;
- wherein the first chip is a logic chip, and the plurality of stacked chips is a plurality of stacked memory chips;
- and
- a second molding compound layer on the second RDL.
6 more elements
Dependencies are inferred from the claim text.