Modified pulse-width modulation control zero-voltage-switching power inversion circuits

A soft-switching power inversion circuit for converting a DC voltage received at a DC input to an AC voltage, which is paralleled-connected to the DC input, and includes:

• a first series circuit connected in parallel with said DC input, including a first switch, a second switch and a first transformer primary sequentially connected in series;
• a second series circuit connected in parallel with said DC input, including a second transformer primary, a third switch and a fourth switch sequentially connected in series;
• a top node of said first switch and a non-dot node of said second transformer primary are connected to a positive terminal said DC input;
• a non-dot of said first transformer primary and a bottom node of said fourth switch are connected to a negative terminal of said DC input;
• a first capacitor connected between a second node within said first series circuit and a third node within said second series circuit, wherein said second node is between a bottom node of said second switch and a dot node of said first transformer primary, and wherein said third node is between a dot node of said second transformer primary and a top node of said third switch;
• a center node between said first switch and said second switch is connected to a center node between said third switch and said fourth switch;
• a first driver signal pair includes a first pulse-width modulation driver signal and a first near 50% duty cycle driver signal used to turn-on and turn-off said first switch and said second switch in said first series circuit;
• a second driver signal pair includes a second pulse-width modulation driver signal and a second near 50% duty cycle driver signal used to turn-on and turn-off said third switch and said fourth switch in said second series circuit;
• said two driver signals of said first driver signal pair and said two driver signals of said second driver signal pair are synchronous to each other with 180 degree phase-shift.

A soft-switching power inversion circuit for converting a DC voltage received at a DC input to an AC voltage, which is paralleled-connected to the DC input, and includes:

• a first series circuit connected in parallel with said DC input, including a first switch, a first transformer primary, and a second switch sequentially series-connected,
• a second series circuit connected in parallel with said DC input, including a third switch, a second transformer primary, and a fourth switch sequentially series-connected;
• at least said first transformer primary and at least a first transformer secondary are magnetically coupled to at least a first transformer to provide said AC voltage;
• a first clamping diode, wherein an anode node and a cathode node of said first clamping diode are respectively connected to a second node within said first series circuit and a third node within said second series circuit, wherein said second node is between a non-dot node of said first transformer primary and a top node of said second switch, and wherein said third node is between a bottom node of said third switch and a non-dot node of said second transformer primary;
• a second clamping diode, wherein an anode node and a cathode node of said second clamping diode are respectively connected to a fourth node within said second series circuit and a first node within said first series circuit, wherein said fourth node is between a dot node of said second transformer primary and a top node of said fourth switch, and said first node is between a bottom node of said first switch and a dot node of said first transformer primary;
• a first driver signal pair includes a first pulse-width modulation driver signal and a first near 50% duty cycle driver signal used to turn-on and turn-off said first switch and said second switch in said first series circuit;
• and
• a second driver signal pair includes a second pulse-width modulation driver signal and a second near 50% duty cycle driver signal used to turn-on and turn-off said third switch and said fourth switch in said second series circuit;
• wherein said two driver signals of said first driver signal pair and said two driver signals of said second driver signal pair are synchronous to each other with 180 degree phase-shift.

A soft-switching power inversion circuit for converting a DC voltage received at a DC input to an AC voltage, which is paralleled-connected to the DC input, and includes:

• a first series circuit connected in parallel with said DC input and includes a first capacitor and a second capacitor sequentially connected in series;
• a second series circuit connected in parallel with said DC input and includes a first transformer primary, a third capacitor, and a second transformer primary sequentially connected in series, wherein a dot node of said first transformer primary and a dot node of said second transformer primary are respectively connected to a a positive terminal and a negative terminal of said DC input;
• at least a first transformer secondary, wherein said first transformer primary and at least said first transformer secondary are magnetically coupled to at least a first transformer to provide said AC voltage;
• a first switch-pair includes a first switch and a second switch sequentially connected in series;
• a second switch-pair includes a third switch and a fourth switch sequentially connected in series;
• a third series circuit connected in parallel with said third capacitor including said first switch-pair and said second switch-pair sequentially connected in series;
• a center node of said first capacitor and said second capacitor within said first series circuit is connected to a center node of said first switch-pair and said second switch-pair within said third series circuit;
• an anode node and a cathode node of a first diode are respectively connected to a center node of said first switch-pair and a positive node of said DC input;
• an anode node and a cathode node of a second diode are respectively connected to a negative node of said DC input and a center node of said second switch-pair;
• a first driver signal pair includes a first near 50% duty cycle driver signal and a first pulse-width modulation driver signal used to respectively turn-on and turn-off said first switch and said second switch in the first switch pair;
• a second driver signal pair includes a second pulse-width modulation driver signal and a second near 50% duty cycle driver signal used to respectively turn-on and turn-off said third switch and said fourth switch in the second switch pair;
• said two driver signals of said first driver signal pair and said two driver signals of said second driver signal pair are synchronous to each other with 180 degree phase-shift.