Enhanced superconducting transition temperature in electroplated Rhenium
AssigneesThe Regents of the University of Colorado, a body corporate, The Government of the United States of America, as represented by the Secretary of Commerce National Institite of Standards and Technology
InventorsDonald David, David Pappas, Xian Wu
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Abstract
This disclosure describes systems, methods, and apparatus for multilayer superconducting structures comprising electroplated Rhenium, where the Rhenium operates in a superconducting regime at or above 4.2 K, or above 1.8 K where specific temperatures and times of annealing have occurred. The structure can include at least a first conductive layer applied to a substrate, where the Rhenium layer is electroplated to the first layer. A third layer formed from the same or a different conductor as the first layer can be formed atop the Rhenium layer.
Claims20
A superconducting circuit system comprising:
- a means for maintaining the circuit at or below 6.0 K;
- a substrate having a circular cross section;
- a first conductive layer bonded to the substrate;
- an amorphous Re layer deposited over the first conductive layer using electroplating, and the amorphous Re layer having a thickness of between 10 nm and 1000 nm;
- and
- a second conductive layer bonded to the amorphous Re layer.
A superconducting circuit system comprising:
- a means for maintaining the circuit at or below 6.0 K;
- a substrate;
- a first conductive layer bonded to the substrate;
- an amorphous Re layer deposited over the first conductive layer using electroplating, and the amorphous Re layer having a thickness of between 10 nm and 1000 nm;
- a second conductive layer bonded to the amorphous Re layer;
- and
- one or more additional pairs of layers between the first conductive layer and the amorphous Re layer and wherein each of the one or more additional pairs of layers comprise another amorphous Re layer and another conductive layer.
A method of fabricating at least one superconducting circuit on a multilayer circuit board, the method comprising:
- forming a via between at least two layers of the multilayer circuit board;
- applying a first conductive layer onto a wall of the via by electroless plating;
- electroplating an amorphous Re layer above the first conductive layer to a thickness of between 10 nm to 1000 nm;
- applying a second conductive layer onto the amorphous Re layer;
- wherein
- the superconducting circuit is superconducting at or above 4.2K.
Dependencies are inferred from the claim text.