Semiconductor device with improved short circuit withstand time and methods for manufacturing the same

A semiconductor device comprising:

• a substrate, the substrate having a first conductivity type;
• a drift layer on the substrate, the drift layer having the first conductivity type;
• a well region in the drift layer, wherein:
• the well region has a second conductivity type opposite the first conductivity type;
• and
• the well region provides a channel region;
• and
• a source region in the well region, wherein:
• the well region is between the source region and the drift layer;
• the source region has the first conductivity type;
• the source region comprises a first region of decreased depth compared to a second region of the source region;
• and
• a doping concentration of the source region remains constant across the first region and the second region.

A method for manufacturing a semiconductor device comprising:

• providing a substrate having a first conductivity type;
• providing a drift layer on the substrate, the drift layer having the first conductivity type;
• providing a well region in the drift layer such that:
• the well region has a second conductivity type opposite the first conductivity type;
• and
• the well region provides a channel region;
• and
• providing a source region in the well region such that:
• the well region is between the source region and the drift layer;
• the source region has the first conductivity type;
• and
• the channel region comprises a first region of increased doping concentration at a distance from a junction between the source region and the well region, and the first region is laterally separated from the source region along a lateral surface of the drift layer opposite the substrate by a second region having a laterally constant doping concentration that is lower than the increased doping concentration of the first region.