Vertical semiconductor device
AssigneeSamsung Electronics Co., Ltd.
InventorsJo-young Park, Chang-seok Kang, Chang-sup Lee, Se-mee Jang
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AssigneeSamsung Electronics Co., Ltd.
InventorsJo-young Park, Chang-seok Kang, Chang-sup Lee, Se-mee Jang
Estimating the term…
A vertical semiconductor device including a plurality of interlayer insulating layer patterns spaced apart from each other on a substrate and stacked in a vertical direction; a plurality of conductive layer patterns arranged between the interlayer insulating layer patterns and each having a rounded end, wherein at least one of the conductive layer patterns is configured to extend from one side wall of each of the interlayer insulating layer patterns and include a pad region, and the pad region includes a raised pad portion configured to protrude from a surface of the at least one conductive layer pattern; an upper interlayer insulating layer to cover the interlayer insulating layer patterns and the conductive layer patterns; and a contact plug configured to penetrate the upper interlayer insulating layer to be in contact with the raised pad portion of the at least one conductive layer pattern.
A vertical semiconductor device comprising:
A vertical semiconductor device comprising:
A vertical semiconductor device, comprising:
Dependencies are inferred from the claim text.