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US 11,309,320 B2Granted
Semiconductor storage device
AssigneeSocionext Inc.
InventorTomoyuki Yamada
Life of this patent
Estimating the term…
Abstract
A nonvolatile memory cell using vertical nanowire (VNW) FETs includes a program element of which a gate is connected to a word line, and a switch element that is provided between the program element and a bit line and of which a gate is connected to the word line. The program element and the switch element are each constituted by one or a plurality of VNW FETs, and these VNW FETs are arranged in a line in a first direction.
Claims12
A semiconductor memory device comprising a nonvolatile memory cell, wherein
- the memory cell includes
- a program element of which a gate is connected to a word line, and
- a switch element that is provided between the program element and a bit line and of which a gate is connected to the word line,
- the program element and the switch element are each constituted by one or a plurality of vertical nanowire (VNW) FETs, and
- the VNW FETs constituting the program element and the switch element are arranged in a line in a first direction.
2 more elements
A semiconductor memory device comprising a nonvolatile memory cell, wherein
- the memory cell includes
- a program element of which a gate is connected to a first word line, and
- a switch element that is provided between the program element and a bit line and of which a gate is connected to a second word line,
- the program element and the switch element are each constituted by one or a plurality of vertical nanowire (VNW) FETs, and
- the VNW FETs constituting the program element and the switch element are arranged in a line in a first direction.
2 more elements
Dependencies are inferred from the claim text.