Semiconductor device with single step height and method for fabricating the same

A method for fabricating a semiconductor device, comprising:

• providing a substrate comprising an array area and a peripheral area adjacent to the array area;
• forming word line structures and source/drain regions in the array area, and a word line protection layer on the array area;
• wherein the step of forming the word line structures comprises:
• forming word line trenches in the array area;
• conformally forming word line dielectric layers in the word line trenches;
• forming word line electrodes on the word line dielectric layers and in the word line trenches;
• forming a layer of capping material filled the word line trenches and covered the array area and the peripheral area;
• and
• removing the layer of capping material covered the peripheral area to turn the layer of capping material into word line capping layers and the word line protection layer;
• wherein the word line dielectric layers, the word line electrodes, the word line capping layers together form the word line structures;
• forming a first hard mask layer over the substrate and having a step height adjacent to a border between the array area and the peripheral area;
• forming a bit line contact in the array area and between the word line structures by using the first hard mask layer as a pattern guide;
• and
• forming a gate electrode layer on the peripheral area.