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US 11,309,248 B2Granted
Semiconductor integrated circuit device
AssigneeSocionext Inc.
InventorsAtsushi Okamoto, Hirotaka Takeno
Life of this patent
Estimating the term…
Abstract
A power switch cell using vertical nanowire (VNW) FETs includes a switch element configured to be capable of switching between electrical connection and disconnection between a global power interconnect and a local power interconnect. The switch element is constituted by at least one VNW FET. The top electrode of the VNW FET constituting the switch element is connected with the global power interconnect.
Claims14
A semiconductor integrated circuit device comprising:
- a global power interconnect;
- and
- a power domain,
- wherein
- the power domain includes
- a local power interconnect,
- a plurality of standard cells connected with the local power interconnect, and
- a power switch cell,
- the power switch cell includes
- a switch element configured to be capable of switching between electrical connection and disconnection between the global power interconnect and the local power interconnect,
- the switch element is constituted by at least one vertical nanowire (VNW) FET, and
- a top electrode of the VNW FET constituting the switch element is connected with the global power interconnect.
9 more elements
A semiconductor integrated circuit device comprising:
- a global power interconnect;
- and
- a power domain,
- wherein
- the power domain includes
- a local power interconnect,
- a plurality of standard cells connected with the local power interconnect, and
- a power switch cell,
- the local power interconnect includes
- first and second power interconnects that extend in parallel in a first direction and supply a first power supply potential, and
- a third power interconnect that extends in the first direction between the first and second power interconnects and supplies a second power supply potential different from the first power supply potential,
- the power switch cell includes
- a switch element configured to be capable of switching between electrical connection and disconnection between the global power interconnect and the first and second power interconnects, and
- a bottom region overlapping the third power interconnect as viewed from top,
- the switch element includes at least one first vertical nanowire (VNW) FET placed in a region between the first power interconnect and the third power interconnect and at least one second VNW FET placed in a region between the second power interconnect and the third power interconnect, and
- top electrodes of the first and second VNW FETs are connected with the global power interconnect, and bottom electrodes of the first and second VNW FETs are connected with the bottom region.
13 more elements
Dependencies are inferred from the claim text.