Semiconductor module, electronic device, and printed wiring board
AssigneeCanon Kabushiki Kaisha
InventorHideto Takahashi
Life of this patent
Estimating the term…
Abstract
A semiconductor module includes a printed wiring board and a semiconductor device. The printed wiring board includes a plurality of lands bonded to the semiconductor device via solder, and a solder resist. The plurality of lands includes a first land positioned in a vicinity of an outer edge of the insulating substrate and including a first edge portion, a second edge portion, a third edge portion, and a fourth edge portion. The first edge portion and the second edge portion are configured not to overlap with the solder resist and the third edge portion and the fourth edge portion are configured to overlap with the solder resist.
Claims16
A semiconductor module comprising:
- a printed wiring board;
- and
- a semiconductor device mounted on the printed wiring board,
- the printed wiring board comprising:
- an insulating substrate;
- a first land disposed on a main surface of the insulating substrate and bonded to the semiconductor device via solder;
- and
- a second land disposed on the main surface of the insulating substrate and bonded to the semiconductor device via solder;
- a solder resist disposed on the main surface of the insulating substrate and configured to cover one portion of each of the first land and the second land,
- wherein the first land comprises a first edge portion, a second edge portion, a third edge portion, and a fourth edge portion,
- wherein in a first direction, the first edge portion is positioned at one edge of the first land and the second edge portion is positioned at another edge of the first land, in the plan view,
- wherein in a second direction orthogonal to the first direction, the third edge portion is positioned at one edge of the first land and the fourth edge portion is positioned at another edge of the first land, in the plan view, and
- wherein in the plan view, the first edge portion and the second edge portion are configured not to overlap with the solder resist and the third edge portion and the fourth edge portion are configured to overlap with the solder resist,
- wherein the second land is positioned inside with respect to the first land, in the plan view, and
- wherein in the plan view, an area of a surface of the first land that does not overlap with the solder resist is larger than an area of a surface of the second land that does not overlap with the solder resist.
A printed wiring board on which a semiconductor device is mounted, the printed wiring board comprising:
- an insulating substrate;
- a first land disposed on a main surface of the insulating substrate and bonded to the semiconductor device via solder;
- a second land disposed on the main surface of the insulating substrate and bonded to the semiconductor device via solder;
- and
- a solder resist disposed on the main surface of the insulating substrate and configured to cover one portion of each of the first lands and the second land,
- wherein the first land comprises a first edge portion, a second edge portion, a third edge portion, and a fourth edge portion,
- wherein in a first direction passing through the first edge portion and a center of a mounting area in which the semiconductor device is mounted, the first edge portion is positioned at one edge of the first land and the second edge portion is positioned at another edge of the first land, in the plan view,
- wherein in a second direction orthogonal to the first direction, the third edge portion is positioned at one edge of the first land and the fourth edge portion is positioned at another edge of the first land, in the plan view,
- wherein in the plan view, the first edge portion and the second edge portion are configured not to overlap with the solder resist and the third edge portion and the fourth edge portion are configured to overlap with the solder resist,
- wherein the second land is positioned inside with respect to the first land, in the plan view, and
- wherein in the plan view, an area of a surface of the first land that does not overlap with the solder resist is larger than an area of a surface of the second land that does not overlap with the solder resist.
A semiconductor module comprising:
- a printed wiring board;
- and
- a semiconductor device mounted on the printed wiring board,
- the printed wiring board comprising:
- an insulating substrate;
- a first land disposed on a main surface of the insulating substrate and bonded to the semiconductor device via solder;
- a second land disposed on a main surface of the insulating substrate and bonded to the semiconductor device via solder;
- and
- a solder resist disposed on the main surface of the insulating substrate and configured to cover one portion of each of the first land and the second land,
- wherein the first land comprises a first edge portion, a second edge portion, a third edge portion, and a fourth edge portion,
- wherein in a first direction, the first edge portion is positioned at one edge of the first land and the second portion is positioned at another edge of the first land, in the plan view,
- wherein in a second direction orthogonal to the first direction, the third edge portion is positioned at one edge of the first land and the fourth edge portion is positioned at another edge of the first land, in the plan view,
- wherein in the plan view, the first edge portion and the second edge portion are configured not to overlap with the solder resist and the third edge portion and the fourth edge portion are configured to overlap with the solder resist, and
- wherein the first land comprises a land body and the first land comprises at least one of a first projecting portion and a second projecting portion.
Dependencies are inferred from the claim text.