Packaged semiconductor devices having enhanced thermal transport and methods of manufacturing the same

A packaged semiconductor device, comprising:

• a package substrate;
• a first semiconductor device arranged on the package substrate;
• at least one second semiconductor device on the first semiconductor device, which partially covers the first semiconductor device;
• a heat dissipating insulation layer extending as a coating on the first and second semiconductor devices;
• a first conductive heat dissipation member extending on a portion of the heat dissipating insulation layer, which is located on an underlying portion of the first semiconductor device exposed by the second semiconductor device;
• a second conductive heat dissipation member on another portion of the heat dissipation insulation layer that extends on the second semiconductor device;
• and
• a protective member on the package substrate, which covers the first and second semiconductor devices and the first conductive heat dissipation member, said protective member including a first covering portion, which covers upper surfaces of the first and second conductive heat dissipation members, and a second covering portion, which covers side surfaces of the first and second semiconductor devices and the first covering portion;
• wherein the upper surface of the first conductive heat dissipation member is coplanar with the upper surface of the second conductive heat dissipation member.

An electronic device, comprising:

• a substrate;
• a first electronic product arranged on the substrate;
• at least one second electronic product extending on, and partially covering, the first electronic product;
• a plurality of bonding wires electrically coupling the at least one second electronic product to said substrate;
• a heat dissipating insulation layer extending as a coating on the substrate, the first and second electronic products, and the plurality of bonding wires;
• a conductive heat dissipation member extending upwardly from the heat dissipating insulation layer, and on portions of the first and second electronic products;
• and
• a protective member on the substrate, which covers the first and second electronic products and the conductive heat dissipation member, said protective member including a first covering portion covering an upper surface of the conductive heat dissipation member and a second covering portion covering side surfaces of first and second electronic products and the first covering portion.