Folded substrate for stacked integrated circuit devices

A semiconductor device comprising:

• a wiring substrate that has flexibility and includes a first surface and a second surface located at opposite to the first surface, wherein the wiring substrate includes
• at least two mounting portions that are stacked spaced apart from each other, the at least two mounting portions including:
• a first mounting portion having first connecting pads at the first surface, and
• a second mounting portion adjacent to the first mounting portion in a stacking direction and having second connecting pads at the first surface and third connecting pads at the second surface, and
• at least one connecting portion, each of the at least one connecting portion being bent to connect two of the at least two mounting portions that are adjacent in the stacking direction;
• at least one semiconductor chip mounted on at least the first mounting portion of the at least two mounting portions;
• a plurality of conductive connecting members connecting the at least two mounting portions to each other in the stacking direction, the plurality of conductive connecting members being arranged between the at least two mounting portions without an interposer, each of the plurality of conductive connecting members having a height corresponding to a distance between adjacent two of the at least two mounting portions, the conductive connecting members including
• a set of first conductive connecting members, wherein each of the first conductive connecting members is directly connected to both a corresponding one of the first connecting pads and a corresponding one of the second connecting pads and extends across a gap between the corresponding one of the first connecting pads and the corresponding one of the second connecting pads in the stacking direction;
• and
• a set of second conductive connecting members, wherein each of the second conductive connecting members is directly connected to a corresponding one of the third connecting pads;
• and
• an encapsulation resin encapsulating all of the wiring substrate, the at least one semiconductor chip, and the plurality of conductive connecting members,
• wherein the wiring substrate includes a plurality of wiring layers and an insulation layer located between the plurality of wiring layers, and
• wherein the second mounting portion includes a first signal transmission path that extends straight through the second mounting portion in the stacking direction and is formed by the plurality of wiring layers electrically connected at a position overlapped with both of one of the first conductive connecting members and one of the second conductive connecting members.