Method and device for self trimming memory devices
AssigneeMicron Technology, Inc.
InventorsAntonino Mondello, Alberto Troia
Life of this patent
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AssigneeMicron Technology, Inc.
InventorsAntonino Mondello, Alberto Troia
Estimating the term…
An integrated memory device can include an array of memory cells with decoding and sensing circuitry, a memory controller, read and write circuitry associated to the sensing circuitry, logic circuit portions in the read and write circuitry including at least a logic element receiving a data stream on a data input and a clock signal on a clock input, and a programmable or trimmable delay element or circuit upstream to the data input or the clock input for self trimming the internal timing of said at least a logic element by aligning in time the clock signal and/or the data stream. Operating parameters of the integrated circuit can be set for self trimming an internal timing of the integrated circuit.
A method, comprising:
A method, comprising:
An integrated memory device, comprising:
An integrated memory device structured to communicate with a host device or a System-on-Chip through a communication channel with respective pads;
Dependencies are inferred from the claim text.