Memory cycling tracking for threshold voltage variation systems and methods
AssigneeMicron Technology, Inc.
InventorHari Giduturi
Life of this patent
Estimating the term…
Abstract
A memory system may include multiple memory cells to store logical data and cycle tracking circuitry to track a number of cycles associated the memory cells. The cycles may be representative of one or more past accesses of the memory cells. The memory system may also include control circuitry to access the memory cells. Accessing of the memory cell may include a read operation, a write operation, or both. During the accessing of the memory cell, the control circuitry may determine a voltage parameter of the access based at least in part on the tracked number of cycles.
Claims24
A system comprising:
- a plurality of memory cells configured to store logical data;
- cycle tracking circuitry configured to track a number of cycles associated with a memory cell of the plurality of memory cells, wherein the cycles are representative of one or more past accesses of the memory cell;
- and
- control circuitry configured to access the memory cell, wherein the access of the memory cell comprises a read operation of the memory cell, a write operation to the memory cell, or both, wherein the control circuitry is configured to determine a voltage parameter of the access of the memory cell based at least in part on the tracked number of cycles of the memory cell.
A memory device comprising:
- a memory array comprising a plurality of memory addresses associated with a plurality of memory cells;
- a plurality of shadow registers configured to define a plurality of memory blocks of the memory array, wherein each memory block of the plurality of memory blocks comprises a subset of memory addresses of the plurality of memory addresses;
- and
- a plurality of cycle count registers, wherein a cycle count register of the plurality of cycle count registers corresponds to a shadow register of the plurality of shadow registers, wherein the shadow register is configured to define a memory block of the plurality of memory blocks, wherein the cycle count register is configured to maintain a cycle count value corresponding to a number of previous operations performed on a memory cell of the memory block.
A method comprising:
- receiving a write request;
- in response to receiving the write request, writing data to a plurality of memory cells of a memory device;
- assigning the plurality of memory cells to a memory block;
- tracking a cycle count value of the memory block, wherein the cycle count value comprises an indication of a number of operations performed on the plurality of memory cells of the memory block;
- and
- accessing a memory cell of the memory block, wherein accessing the memory block comprises:
- determining a selection voltage of the memory cell based at least in part on the cycle count value;
- determining a read sense voltage of the memory cell based at least in part on the cycle count value;
- or
- both.
Dependencies are inferred from the claim text.