Systems and methods for stabilizing cell threshold voltage
AssigneeMicron Technology, Inc.
InventorsPaolo Amato, Marco Sforzin
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Abstract
The present disclosure relates to a memory device comprising a plurality of memory cells, each memory cell being programmable to a logic state corresponding to a threshold voltage exhibited by the memory cell in response to an applied voltage, and a logic circuit portion operatively coupled to the plurality of memory cells, wherein the logic circuit portion is configured to scan memory addresses of the memory device, and to generate seasoning pulses to be applied to the addressed pages of the memory device. A related electronic system and related methods are also disclosed.
Claims29
A memory device comprising:
- a plurality of memory cells, each memory cell being programmable to a logic state corresponding to a threshold voltage exhibited by the memory cell in response to an applied voltage;
- and
- a logic circuit portion operatively coupled to the plurality of memory cells, wherein said logic circuit portion is configured to:
- scan memory addresses of the memory device;
- and
- generate seasoning pulses to be applied to addressed pages of the memory device for stabilization of the threshold voltage of the memory cells.
An electronic system comprising:
- a host device including a processor module;
- a memory device operatively coupled to the host device;
- and
- a managing unit of the memory device, wherein the memory device comprises:
- a plurality of memory cells, each memory cell being programmable to a logic state corresponding to a threshold voltage exhibited by the memory cell in response to an applied voltage;
- and
- a logic circuit portion operatively coupled to the plurality of memory cells, wherein said logic circuit portion is configured to:
- scan memory addresses of the memory device;
- and
- generate seasoning pulses to be applied to addressed pages of the memory device for stabilization of the threshold voltage of the memory cells.
A method for stabilizing threshold voltages of a plurality of memory cells included in a memory device, each memory cell being programmable to a logic state corresponding to a threshold voltage exhibited by the memory cell in response to an applied voltage, the method comprising the steps of:
- scanning memory addresses of the memory device, wherein said scanning is performed by a logic circuit portion internal to the memory device;
- generating, inside the logic circuit portion of the memory device, a seasoning pulse to be applied to addressed pages of the memory device;
- and
- applying a sequence of seasoning pulses to said addressed pages of the memory device.
Dependencies are inferred from the claim text.