Gate driver on array circuit

A gate driver on array (GOA) circuit, comprising a plurality of cascaded GOA units, wherein each of the GOA units comprises:

• a pull-up control circuit, wherein a control terminal of the pull-up control circuit receives a first control signal, a first terminal of the pull-up control circuit is connected to the control terminal of the pull-up control circuit, and a second terminal of the pull-up control circuit outputs a second control signal;
• a pull-up circuit comprising a first transistor, wherein a control terminal of the first transistor is connected to the second terminal of the pull-up control circuit, a first terminal of the first transistor receives a first clock signal, and a second terminal of the first transistor outputs a driving signal;
• a bootstrap capacitor connected between the second terminal of the pull-up control circuit and the second terminal of the first transistor;
• and
• a cascade-transmission circuit comprising a second transistor, wherein a control terminal of the second transistor is connected to the second terminal of the pull-up control circuit, a first terminal of the second transistor receives the first clock signal, and a second terminal of the second transistor outputs a cascade-transmission signal;
• wherein the first control signal is a cascade-transmission signal of a previous stage GOA unit or a start signal, and a duty cycle of the first clock signal is less than 33%,
• wherein the pull-up control circuit comprises:
• a third transistor;
• a fourth transistor, wherein a first terminal of the fourth transistor is connected to a second terminal of the third transistor, and a second terminal of the fourth transistor is connected to the control terminal of the first transistor;
• and
• a fifth transistor, wherein a control terminal of the fifth transistor is connected to the second terminal of the second transistor, a first terminal of the fifth transistor is connected to the first terminal of the fourth transistor, and a second terminal of the fifth transistor is connected to the second terminal of the second transistor
• wherein each of the GOA units comprises a first pull-down circuit, and the first pull-down circuit comprises:
• a sixth transistor, wherein a control terminal of the sixth transistor receives a cascade-transmission signal of a next stage GOA unit, a first terminal of the sixth transistor is connected to the second terminal of the first transistor, and a second terminal of the sixth transistor is connected to a first low voltage terminal;
• a seventh transistor, wherein a control terminal of the seventh transistor is connected to the control terminal of the sixth transistor, and a first terminal of the seventh transistor is connected to the second terminal of the pull-up control circuit and
• an eighth transistor, wherein a control terminal of the eighth transistor is connected to the control terminal of the seventh transistor, a first terminal of the eighth transistor is connected to a second terminal of the seventh transistor, and a second terminal of the eighth transistor is connected to a second low voltage terminal.