Liquid crystal display panel and driving method thereof

A liquid crystal display panel, comprising:

• a pixel unit module comprising a plurality of pixel units, the plurality of pixel units arranged in a matrix;
• a plurality of scanning lines, each of the scanning lines connected to at least two of the pixel units on a same row;
• a gate driving circuit connected to the plurality of scanning lines and providing gate signals for the scanning lines to control the pixel units, which the scanning lines are connected to, to be turned on;
• a plurality of data lines, the plurality of data lines are respectively connected to at least one pixel unit on different columns;
• a data driving circuit, which is connected to the plurality of data lines and provides data signals for the data lines to charge the turn-on pixel units which the data lines are connected to;
• wherein the data signals provided by the data driving circuit for the plurality of data lines are sequentially delayed along a direction away from the gate driving circuit that enables a time to be turned on matching a time to be charged for the plurality of pixel units in the liquid crystal display panel.

A liquid crystal display device, comprising a liquid crystal display panel, wherein the liquid crystal display panel comprises:

• a pixel unit module comprising a plurality of pixel units, the plurality of pixel units arranged in a matrix;
• a plurality of scanning lines, each of the scanning lines connected to at least two of the pixel units on a same row;
• a gate driving circuit connected to the plurality of scanning lines and providing gate signals for the scanning lines to control the pixel units, which the scanning lines are connected to, to be turned on;
• a plurality of data lines, the plurality of data lines are respectively connected to at least one pixel unit on different columns;
• a data driving circuit, which is connected to the plurality of data lines and provides data signals for the data lines to charge the turn-on pixel units which the data lines are connected to;
• wherein the data signals provided by the data driving circuit for the plurality of data lines are sequentially delayed along a direction away from the gate driving circuit that enables a time to be turned on matching a time to be charged for the plurality of pixel units in the liquid crystal display panel.