Electronic circuit, particularly for the implementation of neural networks with multiple levels of precision

An electronic circuit for the implementation of neural networks, comprising:

• a series of calculating blocks that can each implement a group of neurons;
• and
• a transformation block that is linked to said calculating blocks by a communication means and that can be linked at the input of said circuit to an external data bus,
• said transformation block transforming the format of the input data and transmitting said data to all or some of said calculating blocks by means of K independent communication channels,
• K input data words being each cut up into sub-words such that said sub-words are transmitted over multiple successive communication cycles,
• one of said sub-words being transmitted per each of said multiple communication cycles over each of said K communication channels, each being dedicated to one of said input data words, such that said K communication channels can transmit said K input data words in parallel in said multiple communication cycles,
• wherein a number of said sub-words, in said respective one input data word, is smaller than a number of bits, in said respective one input data word.