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US 11,308,290 B2Granted
Mixed signal computer architecture
AssigneeOctavo Systems LLC
InventorGene Alan Frantz
Life of this patent
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Abstract
The present disclosure describes a computer using a combination of analogue and digital components/elements used in a cohesive manner. Depending on the signals and data the computer manipulates, the analog processing elements and digital processing elements can be used separately, independently or in combination to optimize the computational results and the performance of the computer.
Claims17
A mixed signal computer, comprising:
- one or more digital ALUs;
- one or more digital registers, wherein at least one of said digital registers is connected to least one of said digital ALUs;
- one or more analog ALUs;
- one or more analog registers, wherein at least one of said analog registers is connected to least one of said analog ALUs;
- one or more exchange registers, wherein said exchange registers are interconnected with at least one of said digital registers and at least one of said analog registers;
- and
- a control unit, wherein said control unit is configured to control said one or more digital ALUs, said one or more analog ALUs, and said one or more exchange registers;
- a digital memory;
- and
- an analog memory,
- wherein said control unit is configured such that analog data words are written into both said analog and said digital memories using the same address location, and
- wherein data written into said analog memory is converted to a digital format and stored at the corresponding address location in said digital format in said digital memory.
9 more elements
A mixed signal computer, comprising:
- one or more digital ALUs;
- one or more digital registers, wherein at least one of said digital registers is connected to least one of said digital ALUs;
- one or more analog ALUs;
- one or more analog registers, wherein at least one of said analog registers is connected to least one of said analog ALUs;
- and
- one or more exchange registers, wherein said exchange registers are interconnected with at least one of said digital registers and at least one of said analog registers,
- wherein a set of registers are employed to identify when one or more of an analog memory location is refreshed based on its digital counterpart, a digital memory location is refreshed based on its analog counterpart, a digital memory location is refreshed based on an equivalent memory update, and an analog memory location is directly refreshed.
4 more elements
A mixed signal computer, comprising:
- one or more digital ALUs;
- one or more digital registers, wherein at least one of said digital registers is connected to least one of said digital ALUs;
- one or more analog ALUs;
- one or more analog registers, wherein at least one of said analog registers is connected to least one of said analog ALUs;
- one or more exchange registers, wherein said exchange registers are interconnected with at least one of said digital registers and at least one of said analog registers;
- a control unit, wherein said control unit is configured to control said one or more digital ALUs, said one or more analog ALUs, and said one or more exchange registers;
- a digital memory;
- and
- an analog memory,
- wherein said control unit is configured such that digital data words are written into both said analog and said digital memories using the same address location for the corresponding memory array, and
- wherein data written into said digital memory is converted to an analog format and stored at the corresponding address location in said analog format in said analog memory.
8 more elements
Dependencies are inferred from the claim text.