Memory system, memory controller, and operation method of memory system
AssigneeSK hynix Inc.
InventorsSeung Gu Ji, Hyung Min Lee
Life of this patent
Estimating the term…
Abstract
Memory systems, memory controllers, and operation methods of the memory systems are disclosed. In one example aspect, the memory system may suspend a target operation, such as a program operation or an erase operation, based on whether or not to execute a first operation of resetting a reference read bias when a failure occurs in a read operation executed after the target operation is suspended, and a number of times the target operation is suspended. In this way, the memory system may reduce a delay associated with the suspension of program operations and erasure operations.
Claims20
A memory system comprising:
- a memory device including memory cells to store data and operable to perform an operation on one or more memory cells including, a read operation for reading data stored in one or more memory cells, a program operation for writing new data into one or more memory cells, or an erase operation for deleting stored data in one or more memory cells;
- and
- a memory controller in communication with the memory device and configured to control the memory device to perform an operation,
- wherein the memory controller is configured to:
- suspend a target operation that is being executed by the memory device based on i) whether or not to execute a first operation of resetting a reference read bias when a failure occurs in a read operation executed after the target operation is suspended, and ii) a number of times the target operation is suspended, and
- wherein the target operation includes a program operation or an erase operation that has been in progress when suspending the target operation.
A memory controller comprising:
- a memory interface configured to communicate with a memory device;
- and
- a processor configured to communicate with the memory device through the memory interface to suspend the target operation based on whether a first operation configured to reset a reference read bias is performed upon occurrence of a failure in a read operation executed after the target operation is suspended, and based on a suspension count of the target operation,
- wherein the target operation includes a program operation or an erase operation that has been in progress when suspending the target operation.
An operation method of a memory system, the method comprising:
- determining, while a target operation is in progress, whether a first operation configured to reset a reference read bias is performed upon occurrence of a failure in a read operation executed after the target operation is suspended, and based on a suspension count of the target operation;
- and
- suspending the target operation based on whether the first operation is performed and the suspension count of the target operation,
- wherein the target operation includes a program operation or an erase operation that has been in progress when suspending the target operation.
Dependencies are inferred from the claim text.