Multi-level CPU high current protection
AssigneeIntel Corporation
InventorsEfraim Rotem, Nir Rosenzweig, Doron Rajwan, Alon Naveh, Eliezer Weissmann
Life of this patent
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Abstract
Methods and apparatus relating to multi-level CPU (Central Processing Unit) high current protection are described. In one embodiment, different workloads may be assigned different license types and/or weights based on micro-architectural events (such as uop (micro-operation) types and sizes) and/or data types. Other embodiments are also disclosed and claimed.
Claims24
An apparatus comprising:
- first one or more circuitries to receive, from a processor, a request to activate a computing block;
- second one or more circuitries to determine an extreme loading condition associated with the computing block;
- third one or more circuitries to cause to change a voltage of the computing block, based at least in part on the extreme loading condition associated with the computing block;
- and
- fourth one or more circuitries to grant permission to activate the computing block, based at least in part on the change in the voltage of the computing block,
- wherein information stored in memory is to indicate whether the fourth one or more circuitries are to grant permission to activate the computing block, wherein the stored information comprises data corresponding to a first permission associated with a first workload and a second permission associated with a second workload, wherein the first workload is to be executed on the computing block in response to the first permission and the second workload is to be executed on the computing block in response to the second permission, wherein different micro architectural events and their corresponding data widths for the computing block are to be assigned different permission types.
A system comprising:
- an electrical component;
- a voltage generator to supply load current to the electrical component;
- first one or more circuitries to receive, from the electrical component, a request to enter a first state from a second state;
- second one or more circuitries to determine an extreme loading condition of the electrical component corresponding to the first state;
- third one or more circuitries to cause the voltage generator to change a voltage supplied to the electrical component, based at least in part on the extreme loading condition corresponding to the first state;
- and
- fourth one or more circuitries to grant permission to operate in the first state, based at least in part on the change in the voltage,
- wherein information stored in memory is to indicate whether the fourth one or more circuitries are to grant permission to activate the electrical component, wherein the stored information comprises data corresponding to a first permission associated with a first workload and a second permission associated with a second workload, wherein the first workload is to be executed on the electrical component block in response to the first permission and the second workload is to be executed on the electrical component in response to the second permission, wherein different micro architectural events and their corresponding data widths for the electrical component are to be assigned different permission types.
A non-transitory computer-readable storage medium to store instructions that, when executed by a processor within a computing device, cause the processor to perform one or more operations comprising:
- receive, from an electrical component, a request to enter a first state from a second state;
- access a table to determine a worst-case load condition associated with the first state;
- cause to change a voltage of a load line supplying current to the electrical component, based at least in part on the worst-case load condition associated with the second state;
- and
- grant permission to operate in the first state,
- wherein information stored in memory is to indicate whether the fourth one or more circuitries are to grant permission to activate the electrical component, wherein the stored information comprises data corresponding to a first permission associated with a first workload and a second permission associated with a second workload, wherein the first workload is to be executed on the electrical component in response to the first permission and the second workload is to be executed on the electrical component in response to the second permission, wherein different micro architectural events and their corresponding data widths for the electrical component are to be assigned different permission types.
Dependencies are inferred from the claim text.