Perfect detection of concurrent faults in CMOS circuits by exploiting reversible and preservative gates

A method of perfect detection of concurrent faults in CMOS circuits, using reversible gates and preservative gates, comprising the following steps:

• 1) carrying out functions using the reversible gates and the preservative gates, by:
• 1-1) providing a given logic function,
• 1-2) when the given logic function is an irreversible function, converting the irreversible function to a reversible function,
• 1-3) utilizing ET-MPMCT gates for an ESOP synthesis technique, wherein the ESOP technique synthesizes both the reversible function and the irreversible function or a use of a Fredkin synthesis technique to implement a function with a fault preservative circuit,
• 1-4) synthesizing the reversible function using reversible circuit synthesis techniques with reversible gate libraries,
• 1-5) adding an extra parity bit to perform single parity fault detection with converting all gates to preservative versions of all the gates,
• 2) transforming the reversible gates and the preservative gates into CMOS circuit equivalents by:
• 2-1) converting the reversible gates to CMOS forms of the reversible gates.