A light sensing device, comprising:
- a photodiode connected to a first node through a first switch, and configured to provide a sensing current to the first node during a primary integration time;
- a capacitor circuit connected to the first node and including at least one capacitor;
- and
- an analog-to-digital converter (ADC) coupled to the first node and configured to determine a primary value of the sensing current during the primary integration time, and to determine a secondary value of the sensing current after within a secondary integration time after an end of the primary integration time,
- wherein the ADC includes:
- a comparator having a first input terminal connected to the first node and a second input terminal connected to a reference voltage, wherein the comparator is configured to compare a voltage of the first node with the reference voltage, and output a comparison signal at an output terminal of the comparator;
- a counter configured to count the comparison signal according to a clock signal during the primary integration time to generate a primary counting result as the primary value;
- a reset switch connected between the first node and a ground terminal, and configured to receive the comparison signal from a control terminal of the reset switch to be switched according to the comparison signal;
- a logic circuit connected to output terminals of the counter and the comparator, for receiving the clock signal and the comparison signal, respectively, and configured to control the first switch to be respectively turned on during the primary integration time and turned off during the secondary integration time;
- and
- a reference voltage switching circuit connected to the logic circuit, and configured to be controlled by the logic circuit to provide at least one determination reference voltage;
- wherein, when the primary integration time ends, the first node has a residual voltage that does not reach the reference voltage, and the logic circuit controls the reference voltage switching circuit to provide the at least one determination reference voltage to the comparator or the capacitor circuit within the secondary integration time, and the comparator is configured to output the comparison signal according to the at least one determination reference voltage and a voltage of the first node,
- wherein the logic circuit is configured to receive the comparison signal within the secondary integration time, and determine the secondary value based on the comparison signal and output to the counter,
- wherein the counter is configured to combine the primary value and the secondary value, and output a sensing result.