Endoscope and endoscope system

An endoscope system comprising:

• an endoscope including an imager configured to generate an imaging signal by receiving light and performing photoelectric conversion;
• a controller configured to perform image processing on the imaging signal that is generated by the imager;
• a transmission path configured to connect the imager and the controller with each other and transmit the imaging signal;
• a data signal generating circuit configured to generate a pulsed data signal and output the pulsed data signal;
• a reference clock signal generating circuit configured to generate a pulsed reference clock signal and output the pulsed reference clock signal;
• a superimposed signal generating circuit that is arranged on a side of a proximal end of the transmission path, the superimposed signal generating circuit being configured to generate, as a superimposed signal, a signal obtained by associating High and Low of the data signal with a change in a pulse width of the reference clock signal and output the superimposed signal to the transmission path;
• a parallel-serial converter circuit that is arranged on a side of a distal end of the transmission path, the parallel-serial converter circuit being configured to perform parallel-serial conversion on the imaging signal and then output the converted imaging signal to the transmission path;
• a PLL circuit that is arranged on the side of the distal end of the transmission path, the PLL circuit being configured to generate a multiplied clock signal that is obtained by multiplying a frequency of the superimposed signal by at least 2 in synchronization with any one of a rise edge and a falling edge of the superimposed signal, the PLL circuit being configured to output the generated multiplied clock signal directly to both the parallel-serial converter circuit and a restoring circuit, the multiplied clock signal being a signal for driving the parallel-serial converter circuit;
• the restoring circuit that is arranged on the side of the distal end of the transmission path, the restoring circuit being configured to restore, based on the superimposed signal and the multiplied clock signal, the reference clock signal and the data signal contained in the superimposed signal;
• and
• a timing generating circuit that is arranged on the side of the distal end of the transmission path, the timing generating circuit being configured to generate, based on the reference clock signal and the data signal, a drive signal for driving the imager.