Semiconductor device and manufacturing method of semiconductor device
AssigneeSK hynix Inc.
InventorKang Sik Choi
Life of this patent
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Abstract
A semiconductor device and a manufacturing method thereof includes a source contact structure, a gate stack structure including a side region adjacent to the source contact structure, and a center region extending from the side region. The semiconductor device further includes a source gate pattern disposed under the side region of the first gate stack structure. The source gate pattern has an inclined surface facing the source contact structure. The semiconductor device also includes a channel pattern penetrating the center region of the gate stack structure, the channel pattern extending toward and contacting the source contact structure.
Claims14
A method of manufacturing a semiconductor device, the method comprising:
- forming supports penetrating a well structure, the supports protruding upward from the well structure;
- forming a stack structure on the supports, the stack structure penetrated by holes and having an etch stop pattern disposed on a portion of a bottom surface of the stack structure facing the well structure;
- forming a multi-layered memory layer on a surface of an opening region including a horizontal space opened between the well structure and the stack structure and the holes;
- forming a channel layer on a surface on the multi-layered memory layer;
- forming a gap fill insulating layer on the channel layer, the gap fill insulating layer filling the opening region;
- and
- forming a slit penetrating the etch stop pattern from the stack structure, the slit separating the etch stop pattern into source gate patterns, wherein the slit is formed such that each of the source gate patterns has an inclined surface toward the slit.
A method of manufacturing a semiconductor device, the method comprising:
- forming supports penetrating a well structure, the supports protruding upward from the well structure;
- forming a stack structure on the supports, the stack structure penetrated by holes and having an etch stop pattern disposed on a portion of a bottom surface of the stack structure facing the well structure;
- forming a multi-layered memory layer on a surface of an opening region including a horizontal space opened between the well structure and the stack structure and the holes;
- forming a channel layer on a surface on the multi-layered memory layer;
- forming a gap fill insulating layer on the channel layer, the gap fill insulating layer filling the opening region;
- forming a slit penetrating the etch stop pattern from the stack structure, the slit separating the etch stop pattern into source gate patterns;
- forming a protective layer on a sidewall of the slit;
- forming a first trench penetrating the multi-layered memory layer and the channel layer not blocked by the protective layer, the first trench extending to the inside of the gap fill insulating layer;
- forming a doped semiconductor pattern extending from the inside of the first trench to between the source gate patterns;
- and
- forming a protective pattern exposing a first part of the doped semiconductor pattern by etching the protective layer.
Dependencies are inferred from the claim text.