US 11,171,619 B2 · Transconductance boosted cascode compensation for amplifier

Abstract

A differential pair of transistors receives input voltages. Current mirror transistors and cascode transistors are coupled to the differential pair of transistors. The differential pair of transistors is coupled between the cascode transistors and a tail transistor that draws a first bias current from a tail node, the first bias current having a magnitude equal to a product of a total bias current and a constant that is less than one. A first current source transistor draws a second bias current from a node between the differential pair and cascode transistors so the second bias current bypasses one transistor of the differential pair of transistors. The second bias current has a magnitude equal to a product of the total bias current and a value equal to one minus the constant. An output stage is biased by an output at node between the cascode transistors and the current mirror transistors.

Claims28

Dependent claims

An amplifier, comprising:

an amplifier stage comprising:
a differential pair of transistors receiving a first voltage and a second voltage;
a current mirror pair of transistors;
a cascode pair of transistors coupled between the differential pair of transistors at first and second nodes and the current mirror pair of transistors at third and fourth nodes;
wherein the differential pair of transistors are coupled between the cascode pair of transistors and a tail node;
and
a tail transistor drawing a first bias current from the tail node, the first bias current having a magnitude equal to a product of a total bias current and a constant k, the constant k being less than one;
a first current source transistor drawing a second bias current from the first node or second node so that the second bias current bypasses one of the differential pair of transistors, the second bias current having a magnitude equal to a product of the total bias current and a value equal to one minus k;
and
an output stage biased by the third or fourth node.

7 more elements

An amplifier, comprising:

an amplifier stage comprising:
a differential pair of transistors receiving a first voltage and a second voltage;
a current mirror pair of transistors;
and
a cascode pair of transistors coupled between the differential pair of transistors and the current mirror pair of transistors;
a cascode compensation stage comprising:
an output transistor biased by the current mirror pair of transistors and being directly electrically connected between a supply voltage and a first node;
a compensation cascode transistor biased by the cascode pair of transistors and being directly electrically connected between the first node and a second node;
and
a current source transistor directly electrically connected between the second node and ground;
and
an output stage comprising a transistor having a gate directly electrically connected to the cascode compensation stage, the transistor being directly electrically connected between the supply voltage and an output voltage.

9 more elements

An amplifier, comprising:

an amplifier stage;
a differential pair of transistors receiving a first voltage and a second voltage, wherein the differential pair of transistors comprises:
a first NMOS transistor having a drain, a source coupled to a tail node, and a gate coupled to receive the second voltage;
and
a second NMOS transistor having a drain, a source coupled to the tail node, and a gate coupled to receive the first voltage;
a current mirror pair of transistors, wherein the current mirror pair of transistors comprises:
a first PMOS transistor having a source coupled to a supply node, a drain coupled to a first intermediate node, and a gate coupled to the drain of the first PMOS transistor;
and
a second PMOS transistor having a source coupled to the supply node, a drain coupled to a second intermediate node, and a gate coupled to the gate of the first PMOS transistor;
a cascode pair of transistors coupled between the differential pair of transistors and the current mirror pair of transistors, wherein the cascode pair of transistors comprises:
a third NMOS transistor having a drain coupled to the first intermediate node, a source coupled to the drain of the first NMOS transistor, and a gate;
and
a fourth NMOS transistor having a drain coupled to the second intermediate node, a source coupled to the drain of the second NMOS transistor, and a gate coupled to the gate of the third NMOS transistor;
and
a cascode compensation stage comprising:
an output transistor biased by the current mirror pair of transistors;
and
a compensation cascode transistor biased by the cascode pair of transistors;
and
an output stage coupled to the cascode compensation stage;
a tail current source comprising a fifth NMOS transistor having a drain coupled to the tail node, a source coupled to ground, and a gate;
wherein the output transistor of the cascode compensation stage comprises a third PMOS transistor having a source coupled to the supply node, a drain coupled to the drain of the second PMOS transistor, and a gate coupled to the gates of the first and second PMOS transistors;
wherein the compensation cascode transistor of the cascode compensation stage comprises a sixth NMOS transistor having a drain coupled to the drain of the third PMOS transistor, and a gate coupled to the gates of the third and fourth NMOS transistors;
and
wherein the cascode compensation stage comprises a seventh NMOS transistor having a drain coupled to the source of the sixth NMOS transistor, a source coupled to ground, and a gate coupled to the gate of the fifth NMOS transistor.

22 more elements

An amplifier, comprising:

an amplifier stage comprising:
first and second differential input transistors respectively receiving first and second voltages;
first and second current mirror transistors;
first and second cascode transistors coupled between the first and second differential input transistors and first and second current mirror transistors;
and
a tail current source coupled to sink a first current from the first and second differential input transistors such that the first and second differential input transistors each source a second current to the tail current source, the second current being equal to one half the first current;
a current source configured to sink a third current from the second cascode transistor such that the third current bypasses the second differential input transistor;
and
an output stage biased by the second current mirror transistor and second cascode transistor;
wherein the first current mirror transistor is configured to source the second current to the first cascode transistor, but the second current mirror transistor is sized differently than the first current mirror transistor so as to source a current equal to a sum of the second current and the third current to the second cascode transistor;
wherein the first cascode transistor is configured to source the second current to the first differential input transistor, but the second cascode transistor is size differently than the first cascode transistor so as to draw the current equal to the sum of the second current and the third current from the second current mirror transistor, such that the second cascode transistor has a larger transconductance than the first cascode transistor yet the second differential input transistor has a same transconductance as the first differential input transistor.

8 more elements

An amplifier, comprising:

an amplifier stage comprising:
first and second differential input transistors respectively receiving first and second voltages;
first and second current mirror transistors different in size from one another;
first and second cascode transistors different in size from one another and being coupled between the first and second differential input transistors and first and second current mirror transistors;
wherein the first and second current mirror transistors are coupled between a supply node and the first and second cascode transistors, wherein the supply node receives a positive supply voltage;
wherein the first and second differential input transistors are coupled between the first and second cascode transistors and a tail node;
and
a tail transistor coupled to sink a first current from the tail node;
a current source transistor coupled in parallel with the second current mirror transistor;
a compensation cascode transistor coupled in parallel with the second cascode transistor;
a second tail transistor drawing a second current from the second cascode transistor so that the second current bypasses the second differential input transistor;
and
an output transistor coupled between the supply node and an output node, the output transistor having a control terminal coupled to a drain of the current source transistor and a drain of the compensation cascode transistor.

10 more elements

Dependencies are inferred from the claim text.

Transconductance boosted cascode compensation for amplifier

Life of this patent

Transconductance boosted cascode compensation for amplifier

Life of this patent

Abstract

Claims28