Image sensor with voltage buffer for self-test

A method of self-testing a device under test (DUT) in alternate rows, comprising:

• driving a short voltage pulse to turn a sample and hold (SH) switch on and off to sample a test voltage with a demanded value provided by a ramp voltage supply line and holding the test voltage to a voltage hold capacitor during a readout period of a current row j, wherein j is an integer;
• providing the test voltage from the voltage hold capacitor to a control circuitry during a readout period of a next row j+1;
• injecting a driving voltage from the control circuitry to an injecting input of the DUT based on the test voltage;
• if the row j+1 of the image frame has reached the last row of the subject image frame, comparing measured image values from the DUT with expected values and providing a concluding signal to indicate a pass or fail status to end the self-test;
• and
• if the row j+1 is not the last row of a subject image frame, advancing a next row to be row j+2 and continuing to issue the short voltage pulse to turn the SH switch on and off to sample a test voltage.

A method of self-testing a device under test (DUT) in all rows, comprising:

• issuing a first short voltage pulse to turn a first sample and hold (SH) switch on and off to sample a first test voltage with a demanded value provided by a ramp voltage supply line and holding the first test voltage to a first voltage hold capacitor during a readout period of a current row j, wherein j is an integer;
• providing a second test voltage from a second voltage hold capacitor to a control circuitry;
• injecting a first driving voltage from the control circuitry to an injecting input of the DUT based on the second test voltage;
• advancing the readout period from the row j to a row j+1;
• issuing a second short voltage pulse to turn a second SH switch on and off to sample a second test voltage with a demanded value provided by a ramp voltage supply line and holding the second test voltage to a second voltage hold capacitor;
• providing a first test voltage from a first voltage hold capacitor to the control circuitry;
• and
• injecting a second driving voltage from the control circuitry to the injecting input of the DUT based on the first test voltage.

A self-test image sensing system, comprising:

• a pixel array including a plurality of pixels;
• a control circuitry coupled to the pixel array to control operation and test of the pixel array;
• a readout circuitry controlled by the control circuitry and coupled to the pixel array through a plurality of bitlines to read out analog image data from the pixel array, wherein the readout circuitry comprises
• a plurality of analog-to-digital converters (ADCs) to convert analog image data to digital image data,
• a ramp generator to generate a ramp voltage on a ramp voltage supply line that drives the plurality of ADCs,
• a test voltage sample and hold circuitry, wherein the test voltage sample and hold circuitry comprises
• a first sample and hold (SH) switch, wherein a first terminal of the first SH switch is coupled to the ramp voltage supply line, and wherein a second terminal of the first SH switch is coupled to the control circuitry;
• a first voltage hold capacitor coupled between the second terminal of the first SH switch and a circuit ground;
• and
• an input buffer coupled between the ramp voltage supply line and the first terminal of the first SH switch;
• and
• a function logic coupled to receive digital image data from the readout circuitry and to receive expected data from the control circuitry.