Physically aware topology synthesis of a network
AssigneeArteris, Inc.
InventorsMoez Cherif, Benoit De Lescure
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Abstract
System and methods are disclosed for synthesis of network, such as a network-on-chip (NoC), to generate a network description. The system generates a NoC from a set of physical constraints and performance constraints as well as a set of inputs to a sequencer. The system produces the NoC with all its elements. The resulting output includes placement of the elements on a floorplan of a chip that represents the network, such as the NoC.
Claims14
A method for synthesis and generation of a network-on-chip (NoC), the method comprising:
- receiving a plurality of physical constraints for the NoC;
- receiving a plurality of performance constraints for the NoC;
- and
- generating a network description for the NoC using the plurality of physical constraints and the plurality of performance constraints, wherein the network description satisfies the plurality of physical constraints and the plurality of performance constraints;
- generating a global consolidation roadmap including connectivity between a plurality of initiators and a plurality of targets;
- creating a main node per traffic class;
- decomposing the main node into mergers and splitters;
- decomposing the mergers into a plurality of merger cascades;
- decomposing the splitters into a plurality of splitter cascades;
- physically distributing a first group of the splitter cascades selected from the plurality of splitter cascaded and a first group of the merger cascades selected from the plurality of merger cascaded on the global consolidation roadmap;
- physically distributing a second group of the splitter cascades selected from the plurality of splitter cascaded and a second group of the merger cascades selected from the plurality of merger cascaded on the global consolidation roadmap;
- merging at least two nodes, which are selected from a plurality of nodes, using performance-aware node clustering;
- and
- clustering using performance aware edge clustering.
A non-transitory computer readable medium for storing code, which when executed by one or more processors, would cause the processor to:
- receive a plurality of physical constraints for a network-on-chip (NoC);
- receive a plurality of performance constraints for the NoC and generate a network description for the NoC using the plurality of physical constraints and the plurality of performance constraints, wherein the network description satisfies the plurality of physical constraints and the plurality of performance constraints;
- generate a global consolidation roadmap including connectivity between a plurality of initiators and a plurality of targets;
- create a main node per traffic class;
- decompose the main node into mergers and splitters;
- decompose the mergers into a plurality of merger cascades;
- decompose the splitters into a plurality of splitter cascades;
- physically distribute a first group of the splitter cascades selected from the plurality of splitter cascaded and a first group of the merger cascades selected from the plurality of merger cascaded on the global consolidation roadmap;
- and
- physically distribute a second group of the splitter cascades selected from the plurality of splitter cascaded and a second group of the merger cascades selected from the plurality of merger cascaded on the global consolidation roadmap;
- merge nodes selected from a plurality of nodes using performance-aware node clustering;
- and
- cluster edges using performance aware edge clustering.
Dependencies are inferred from the claim text.