Direct sequence detection and equalization
AssigneeRambus Inc.
InventorsMasum Hossain, Maruf H. Mohammad
Life of this patent
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Abstract
Methods and apparatuses for direct sequence detection can receive an input signal over a communication channel. Next, the input signal can be sampled based on a clock signal to obtain a sampled voltage. A set of reference voltages can be generated based on a main cursor, a set of pre-cursors, and a set of post-cursors associated with the communication channel. Each generated reference voltage in the set of reference voltages can correspond to a particular sequence of symbols. A sequence corresponding to the sampled voltage can be selected based on comparing the sampled voltage with the set of reference voltages.
Claims20
An integrated circuit (IC), comprising:
- a plurality of comparators, wherein each comparator has a respective reference voltage that is adjustable, wherein each comparator outputs a result signal based on comparing a received input from a communication channel with the comparator's reference voltage, wherein reference voltages for the plurality of comparators are computed based on a main cursor and at least one pre-cursor associated with the communication channel, wherein the at least one pre-cursor corresponds to a future symbol, and wherein each computed reference voltage corresponds to a particular sequence of symbols;
- and
- a sequence-selection circuit to select a sequence of symbols based on result signals outputted by the plurality of comparators.
A receiver in a communication system, the receiver comprising:
- a plurality of comparators, wherein each comparator has a respective reference voltage that is adjustable, wherein each comparator outputs a result signal based on comparing a received input from a communication channel with the comparator's reference voltage, wherein reference voltages for the plurality of comparators are computed based on a main cursor and at least one pre-cursor associated with the communication channel, wherein the at least one pre-cursor corresponds to a future symbol, and wherein each computed reference voltage corresponds to a particular sequence of symbols;
- and
- a sequence-selection circuit to select a sequence of symbols based on result signals outputted by the plurality of comparators.
A method, comprising:
- generating a first set of reference voltages based on a main cursor and at least one pre-cursor associated with a communication channel, wherein the at least one pre-cursor corresponds to a future symbol, wherein each generated reference voltage in the first set of reference voltages corresponds to a particular sequence of symbols;
- and
- selecting, by using a sequence-selection circuit, a sequence of symbols based on comparing a received input from the communication channel with the first set of reference voltages.
Dependencies are inferred from the claim text.