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US 11,121,790 B2Granted
Latency reduction in ethernet frames
AssigneeArista Networks, Inc.
InventorsCallum Hunter, Thomas Dejanovic
Life of this patent
Estimating the term…
Abstract
A bitstream representing an Ethernet frame is received over a physical medium. Encoded Ethernet blocks are recovered from the bitstream. The Ethernet blocks are descrambled and provided to downstream switching logic, intact, without removing the synchronization bits that were added during the encoding process. More particularly, the intact descrambled Ethernet block is divided into smaller-sized data words; the size of the data words being an integer multiple of the size of the Ethernet block.
Claims22
A method in a switching device comprising:
- receiving a bitstream at an electrical interface of the switching device connected to a signal transmission medium, the bitstream representative of a received data packet;
- generating a plurality of data blocks from the bitstream, each data block comprising synchronization bits from the bitstream and data comprising the received data packet;
- and
- providing the plurality of data blocks comprising the received data packet to switching logic in the switching device, including for each data block:
- partitioning each data block to generate one or more n-bit data words;
- and
- outputting a plurality of n-bit data words comprising the plurality of data blocks onto an n-bit data bus connected to the switching logic, wherein n and a size of a data block are related by an integer factor.
4 more elements
A switching device comprising:
- an electrical interface for connection to a signal transmission medium;
- first logic circuitry in electrical connection with the electrical interface to receive a bitstream organized as a plurality of data blocks, each data block including synchronization bits and data bits, the first logic circuitry configured to output each data block as a plurality of n-bit data words, wherein one of the n-bit data words includes the synchronization bits, wherein n and a size of a data block are related by an integer factor;
- second logic circuitry connected to the first logic circuitry to receive the plurality of n-bit data words and configured to perform at least on operation on the plurality of n-bit data words, wherein the synchronization bits in said one of the n-bit data word are not removed;
- and
- switching logic connected to the second logic circuitry to receive the plurality of n-bit data words, including the synchronization bits in said one of the n-bit data words.
2 more elements
A switching device comprising:
- means for receiving a bitstream at an electrical interface of the switching device connected to a signal transmission medium, the bitstream representative of a received Ethernet frame;
- means for generating a plurality of Ethernet blocks from the bitstream, each Ethernet block comprising synchronization bits from the bitstream and data comprising the received Ethernet frame;
- and
- means for providing the plurality of Ethernet blocks comprising the received Ethernet frame to switching logic in the switching device, including for each Ethernet block:
- partitioning each Ethernet block to generate one or more n-bit data words;
- and
- outputting a plurality of n-bit Ethernet words comprising the plurality of Ethernet blocks onto an n-bit data bus connected to the switching logic, wherein n and a size of a Ethernet block are related by an integer factor.
4 more elements
Dependencies are inferred from the claim text.