Multi-stage sigma-delta analog-to-digital converter with dither
AssigneeAnalog Devices International Unlimited Company
InventorRoberto Sergio Matteo Maurino
Life of this patent
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Abstract
Techniques to implement subtractive dither in a multi-stage ADC. Subtractive dither involves adding a first dither signal at a first node and adding a second dither signal at a second node (which can be the same as the first node), where the first and second dither signal combine and sum to approximately zero. By utilizing subtractive dither in a multi-stage ADC, the headroom requirements of a loop filter in a main loop of the ADC and the range requirements of a feedback DAC in the main loop can both be relaxed.
Claims20
A multi-stage sigma-delta analog-to-digital converter (ADC) configured to receive an analog input signal at an input and generate a digital output signal, the multi-stage sigma-delta ADC comprising:
- an input summing node configured to receive and combine the analog input signal and an output of a digital-to-analog converter (DAC) circuit;
- a first stage ADC configured to receive the analog input signal and a first dither signal and to generate a first output to the digital-to-analog converter (DAC) circuit;
- and
- a second stage sigma-delta modulator configured to receive an output of the input summing node and a second dither signal and to generate a second output to the digital-to-analog converter (DAC) circuit,
- wherein the first dither signal and the second dither signal offset one another at a node coupled to an input of the DAC circuit.
A method of using a multi-stage sigma-delta analog-to-digital converter (ADC) configured to receive an analog input signal at an input and generate a digital output signal, the method comprising:
- receiving and combining the analog input signal and an output of a digital-to-analog converter (DAC) circuit at an input summing node;
- receiving, by a first stage ADC, the analog input signal and a first dither signal and generating a first output to the digital-to-analog converter (DAC) circuit;
- and
- receiving, by a second stage sigma-delta modulator, an output of the input summing node and a second dither signal and generating a second output to the digital-to-analog converter (DAC) circuit,
- wherein the first dither signal and the second dither signal offset one another at a node coupled to an input of the DAC circuit.
A multi-stage sigma-delta analog-to-digital converter (ADC) configured to receive an analog input signal at an input and generate a digital output signal, the multi-stage sigma-delta ADC comprising:
- means for receiving and combining the analog input signal and an output of a digital-to-analog converter (DAC) circuit;
- means for receiving, by a first stage ADC, the analog input signal and a first dither signal and generating a first output to the digital-to-analog converter (DAC) circuit;
- and
- means for receiving, by a second stage sigma-delta modulator, an output of an input summing node and a second dither signal and generating a second output to the digital-to-analog converter (DAC) circuit,
- wherein the first dither signal and the second dither signal offset one another at a node coupled to an input of the DAC circuit.
Dependencies are inferred from the claim text.