Duty cycle correction circuit and semiconductor system
AssigneeSK hynix Inc.
InventorsKwang Soon Kim, Noh Hyup Kwak
Life of this patent
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Abstract
A duty cycle correction circuit may include a data alignment circuit, a correction value generation circuit, and a dock generation circuit. The data alignment circuit may align unit pattern data based on a strobe clock signal. The correction value generation circuit may generate a duty correction value by measuring the amount of charges corresponding to the aligned data. The clock generation circuit may correct the duty ratio of the strobe clock signal based on the duty correction value.
Claims18
A duty cycle correction circuit comprising:
- a data alignment circuit suitable for receiving unit pattern data into which at least one measurement data has been inserted and aligning the unit pattern data based on a strobe clock signal;
- a correction value generation circuit suitable for counting a section from time at which a duty measurement operation is entered to time at which charges for charging corresponding to the measurement data aligned by the data alignment circuit are stored by a preset value and outputting the section as a duty correction value;
- and
- a clock generation circuit suitable for generating the strobe clock signal and correcting a duty ratio of the strobe clock signal based on the duty correction value.
A duty cycle correction circuit comprising:
- a data alignment circuit suitable for receiving unit pattern data into which at least one measurement data has been inserted in response to first and second strobe clock signals corresponding to a rising edge and falling edge of a strobe clock signal, respectively, and aligning the unit pattern data based on the first and second strobe clock signals, respectively;
- a correction value generation circuit suitable for counting a section from time at which a duty measurement operation is entered to time at which charges for charging corresponding to the measurement data aligned by the first and second strobe clock signals, respectively, are stored by a preset value and outputting the counted section as a duty correction value;
- and
- a clock generation circuit suitable for generating the first and second strobe clock signals and correcting duty ratios of the first and second strobe clock signals based on the duty correction value.
A duty cycle correction circuit comprising:
- a data alignment circuit suitable for continuously receiving unit pattern data into which at least one measurement data has been inserted, based on a plurality of strobe clock signals having different phases, respectively, and aligning the unit pattern data based on the plurality of strobe dock signals, respectively;
- a correction value generation circuit suitable for counting a section from time at which a duty measurement operation is entered to time at which charges for charging corresponding to the measurement data aligned by the plurality of strobe clock signals, respectively, are stored by a preset value and outputting the counted section as a duty correction value;
- and
- a clock generation circuit suitable for generating the plurality of strobe clock signals and correcting duty ratios of the plurality of strobe clock signals based on the duty correction value.
A semiconductor system comprising:
- a host device suitable for outputting a command signal and data and providing system clock information;
- and
- a semiconductor device suitable for generating a strobe clock signal based on the system clock information, continuously receiving unit pattern data, into which at least one measurement data has been inserted and aligning the unit pattern data based on the strobe clock signal, upon a duty measurement operation, and generating a duty correction value for correcting a duty ratio of the strobe clock signal through a charging operation and a counting operation using the aligned measurement data.
Dependencies are inferred from the claim text.