Accurate valley detection for secondary controlled flyback converter

An alternating current-direct current (AC-DC) converter, wherein the AC-DC converter comprises:

• a transformer coupled between a primary side and a secondary side of the AC-DC converter, wherein the primary side is to receive a rectified AC input and the secondary side is to provide a DC output, wherein the primary side includes a power switch, and wherein the secondary side includes a synchronous rectifier (SR);
• and
• a secondary side integrated circuit (IC) controller comprising:
• a SR-SNS pin to sense a voltage at the SR on the secondary side;
• a peak-detector block to detect peak voltages that are sensed on the SR-SNS pin;
• a zero-crossing detector block to detect when the voltage sensed on the SR-SNS pin crosses zero voltage;
• and
• a calibration block configured to:
• measure a loop turn-around delay (Tloop), a time (Tpkpk) between two successive peak voltages detected on the SR-SNS pin, and a time (Tzpk) from when the voltage sensed on the SR-SNS pin crosses zero voltage to when a peak voltage is detected on the SR-SNS pin;
• and
• set timing for a signal to turn on the power switch in the primary side based at least on the Tloop, the Tpkpk, and the Tzpk.

A method of operating a secondary side integrated circuit (IC) controller for an alternating current-direct current (AC-DC) converter, the method comprising:

• performing a calibration cycle by the secondary side IC controller, wherein performing the calibration cycle comprises:
• measuring a loop turn-around delay (Tloop) based on a time when a voltage, sensed at a synchronous rectifier (SR) in a secondary side of the AC-DC converter, crosses zero voltage;
• determining a time (Tpkpk) between two successive peak voltages detected at the SR;
• and
• after measuring Tloop, determining a time (Tzpk) between when the voltage sensed at the SR first crosses zero voltage and when a first peak voltage is detected at the SR;
• for a cycle subsequent to the calibration cycle, calculating timing for a signal to turn on a power switch in a primary side of the AC-DC converter based at least on the Tloop, the Tpkpk, and the Tzpk;
• and
• in response to detecting a second peak voltage at the SR, generating the signal to turn on the power switch based on the calculated timing, wherein the second peak voltage is detected subsequently to the first peak voltage.