High definition VP8 decoder

An electronic device comprising:

• processing circuitry;
• and
• memory coupled to the processing circuitry and storing instructions that, when executed by the processing circuitry, cause the processing circuitry to:
• execute an entropy decoder routine to perform entropy decoding in a frame level pipelined manner on a bitstream to produce first output data;
• execute a numerical calculation routine to perform at least one of inverse quantization or inverse frequency transform in a row level pipelined manner on the first output data to produce second output data;
• execute a deblocking filtering routine to perform deblocking filtering in a row level pipelined manner on first input data that is based on the second output data to produce third output data, wherein the deblocking filtering is performed using a non-exact approximate loop filter;
• perform a feedback operation on the third output data to produce fourth output data, wherein the feedback operation includes performing a fading compensation in a row level pipelined manner followed by performing a motion compensation operation in a row level pipelined manner on the third output data to produce the fourth output data;
• performing a summing operation on the second output data and the fourth output data to produce the first input data;
• and
• output a decoded video output based on the third output data.