Gateway device

A gateway device that relays communication between a first network and a second network, the device comprising:

• a first transceiver that transmits and receives signals to and from the first network;
• a second transceiver that transmits and receives signals to and from the second network;
• a relay switch that relays communication;
• an arithmetic device that relays communication between the first network and the second network via the first transceiver and the second transceiver;
• and
• a power supply circuit that supplies power to the arithmetic device, wherein
• both the first transceiver and the second transceiver are configured to be able to switch between a first mode for transmitting and receiving signals and a second mode having lower power consumption than the first mode,
• when an instruction is output to switch the first transceiver and the second transceiver from the first mode to the second mode, the arithmetic device outputs the instruction and turns off the power supply circuit to block power supply to the arithmetic device,
• the first transceiver, when operating in the second mode, is configured to be able to receive an activation instruction signal instructing to activate the gateway device from the first network and shift to the first mode,
• the second transceiver, when operating in the second mode, is configured to be able to receive the activation instruction signal from the second network and shift to the first mode,
• when the first transceiver and the second transceiver operate in the second mode, the gateway device turns on the relay switch to relay the activation instruction signal between the first network and the second network without interposing the arithmetic device,
• the first transceiver, when receiving the activation instruction signal, is configured to output a first activation instruction detection signal indicating the reception to the second transceiver,
• the second transceiver, when receiving the activation instruction signal, is configured to output a second activation instruction detection signal indicating the reception to the first transceiver,
• the power supply circuit is configured to supply power to the arithmetic device according to at least one of a case where the first transceiver outputs the first activation instruction detection signal or a case where the second transceiver outputs the second activation instruction detection signal, and
• a delay circuit configured to turn off the relay switch after a delay of a predetermined delay time with at least one of a time when the first transceiver outputs the first activation instruction detection signal or a time when the second transceiver outputs the second activation instruction detection signal as a starting point,
• wherein the delay time is set to be equal to or longer than at least a time from when the first transceiver shifts from the second mode to the first mode to when the first transceiver finishes relaying the activation instruction signal to the second transceiver through the relay switch, and
• wherein the delay time is set to be equal to or longer than at least a time from when the second transceiver shifts from the second mode to the first mode to when the second transceiver finishes relaying the activation instruction signal to the first transceiver through the relay switch.