Memory device, host device, and memory system

A host device configured to accept a memory device, comprising:

• a first cryptographic module including circuitry and a second cryptographic module including circuitry, the first and second cryptographic modules each configured to perform a normal operation to encrypt and decrypt data to be transmitted and received between the host device and the memory device,
• a third cryptographic module including circuitry and configured to perform a dummy operation based on dummy key information, and
• a control circuit configured to control an operation of the third cryptographic module, the control circuit being configured to cause the third cryptographic module to perform a dummy operation in a period in which one of the first cryptographic module and the second cryptographic module performs a normal operation, wherein
• the first cryptographic module includes a first temporary data generation circuit configured to generate temporary data based on input data,
• the second cryptographic module includes a first encryption circuit configured to perform encryption based on the temporary data generated by the first temporary data generation circuit,
• the third cryptographic module includes a second temporary data generation circuit configured to generate temporary data based on dummy input data and a second encryption circuit configured to perform encryption based on the temporary data generated by the second temporary data generation circuit, and
• the control circuit is configured to cause the second encryption circuit to perform a dummy operation in a period in which only the first temporary data generation circuit of the first temporary data generation circuit and the first encryption circuit performs a normal operation, while causing the second temporary data generation circuit to perform a dummy operation in a period in which only the first encryption circuit of the first temporary data generation circuit and the first encryption circuit performs a normal operation.

A memory system comprising:

• a host device and
• a memory device configured to be connected to the host device,
• wherein the host device includes
• a first cryptographic module including circuitry and a second cryptographic module including circuitry, the first and second cryptographic modules each configured to perform a normal operation to encrypt and decrypt data to be transmitted and received between the host device and the memory device,
• a third cryptographic module including circuitry and configured to perform a dummy operation based on dummy key information, and
• a first control circuit configured to control an operation of the third cryptographic module, the first control circuit being configured to cause the third cryptographic module to perform a dummy operation in a period in which one of the first cryptographic module and the second cryptographic module performs a normal operation, and
• wherein the memory device includes
• a fourth cryptographic module including circuitry and a fifth cryptographic module including circuitry, the fourth and fifth cryptographic modules each configured to perform a normal operation to encrypt and decrypt data to be transmitted and received between the host device and the memory device,
• a sixth cryptographic module including circuitry and configured to perform a dummy operation based on dummy key information, and
• a second control circuit configured to control an operation of the sixth cryptographic module, the second control circuit being configured to cause the sixth cryptographic module to perform a dummy operation in a period in which one of the fourth cryptographic module and the fifth cryptographic module performs a normal operation.