Resistor-capacitor oscillator (RCO) with digital calibration and quantizaton noise reduction

An apparatus, comprising:

• a switched capacitor;
• a low pass filter (LPF) including an input coupled to an output of the switched capacitor;
• a reference voltage generator;
• an integrator including a first input coupled to an output of the LPF and a second input coupled to an output of the reference voltage generator;
• a voltage controlled oscillator (VCO) including an input coupled to an output of the integrator;
• a first frequency divider including an input coupled to an output of the VCO,
• a switched capacitor driver including an input coupled an output of the first frequency divider, wherein the switched capacitor includes an input coupled to an output of the switched capacitor driver;
• and
• a switched capacitor sampler including a first input coupled to the output of the switched capacitor and an output coupled to the input of the LPF.

An apparatus, comprising:

• a switched capacitor configured to generate a sawtooth or ramp voltage in response to a switched capacitor drive signal;
• a low pass filter (LPF) configured to filter the sawtooth or ramp voltage to generate a filtered voltage;
• a reference voltage generator configured to generate a reference voltage;
• an integrator configured to integrate a difference between the sawtooth or ramp voltage and the reference voltage to generate a frequency control signal;
• a voltage controlled oscillator (VCO) configured to generate a first clock based on the frequency control signal;
• a frequency divider configured to frequency divide the first clock to generate a second clock;
• and
• a switched capacitor driver configured to generate the switched capacitor drive signal in response to the second clock.

A method, comprising:

• generating a sawtooth or ramp voltage in response to a switched capacitor drive signal;
• filtering the sawtooth or ramp voltage to generate a filtered voltage;
• generating a reference voltage;
• integrating a difference between the sawtooth or ramp voltage and the reference voltage to generate a frequency control signal;
• generating a first clock based on the frequency control signal;
• frequency dividing the first clock to generate a second clock;
• and
• generating the switched capacitor drive signal based on the second clock.

A wireless communication device, comprising:

• an oscillator, comprising:
• a switched capacitor,
• a low pass filter (LPF) including an input coupled to an output of the switched capacitor,
• a reference voltage generator,
• an integrator including a first input coupled to an output of the LPF and a second input coupled to an output of the reference voltage generator,
• a voltage controlled oscillator (VCO) including an input coupled to an output of the integrator,
• a frequency divider including an input coupled to an output of the VCO,
• a switched capacitor driver including an input coupled an output of the frequency divider, wherein the switched capacitor includes an input coupled to an output of the switched capacitor driver, and
• a switched capacitor sampler including a first input coupled to the output of the switched capacitor and an output coupled to the input of the LPF;
• a signal processing core coupled to the oscillator;
• a transceiver coupled to the signal processing core;
• and
• at least one antenna coupled to the transceiver.