Embedded antenna array metrology systems and methods

A method of testing a phased antenna array using a testing circuit integrated in an integrated circuit of the phased antenna array, the method comprising:

• storing, by a plurality of memory registers, for each antenna element of a plurality of antenna elements of the phased antenna array, a corresponding antenna element identifier (ID);
• storing, by the plurality of memory registers, a testing step identifier (ID) indicative of a testing step of a sequence of testing steps;
• determining, by the integrated circuit, for each antenna element of the plurality of antenna elements of the phased antenna array, using a combination of the corresponding antenna element ID and the testing step ID, a corresponding testing signal indicative of a testing state of the antenna element during the testing step indicated by the testing step;
• and
• causing, by the integrated circuit, each antenna element of the plurality of antenna elements of the phased antenna array to be configured according to the corresponding testing signal during the testing step indicated by the testing step ID;
• wherein testing signals generated by the testing sequence generation logic and indicative of testing states of the plurality of antenna elements across the sequence of testing steps represent a testing matrix.

A phased antenna array comprising:

• an antenna array testing circuit integrated in an integrated circuit of the phased antenna array;
• a plurality of antenna elements;
• and
• a plurality of memory registers of the antenna array testing circuit configured to:
• store, for each antenna element of the plurality of antenna elements of the phased antenna array, a corresponding antenna element identifier (ID);
• store a testing step identifier (ID) indicative of a testing step of a sequence of testing steps,
• a testing sequence generation logic integrated in the integrated circuit of the phased antenna army and configured to determine, for each antenna element of the plurality of antenna elements of the phased antenna array, using a combination of the corresponding antenna element ID and the testing step ID, a corresponding testing signal indicative of a testing state of the antenna element during the testing step indicated by the testing step ID;
• and
• a testing control logic integrated in the integrated circuit of the phased antenna array and configured to cause, each antenna element of the plurality of antenna elements of the phased antenna array, to be configured according to the corresponding testing signal during the testing step indicated by the testing step ID;
• wherein testing signals generated by the testing sequence generation logic and indicative of testing states of the plurality of antenna elements across the sequence of testing steps represent a testing matrix.