US 11,114,565 B2 · Semiconductor device

Abstract

Power consumption of a semiconductor device is reduced by sharpening the rise of a drain current when a gate voltage of a field effect transistor is less than a threshold voltage. As means therefor, in a fully-depleted MOSFET in which a thickness of a semiconductor layer serving as a channel region is 20 nm or less, a gate plug connected to a gate electrode is constituted of a first plug, a ferroelectric film, and a second plug sequentially stacked on the gate electrode. Here, an area where a contact surface between the first plug and the ferroelectric film and a contact surface between the ferroelectric film and the second plug overlap in a plan view is smaller than an area where the gate electrode and a semiconductor layer serving as an active region overlap.

Claims11

Dependent claims

A semiconductor device comprising:

a semiconductor layer having a thickness of 20 nm or less;
a gate electrode formed over the semiconductor layer via a gate insulating film;
a pair of source/drain regions in which an impurity of a first conductivity type is introduced into the semiconductor layer next to the gate electrode;
a first plug electrically connected to the gate electrode;
a ferroelectric film connected to an upper surface of the first plug;
and
a second plug connected to an upper surface of the ferroelectric film,
wherein the gate electrode and the source/drain regions constitute a first field effect transistor, and
a first area where a contact surface between the first plug and the ferroelectric film and a contact surface between the ferroelectric film and the second plug overlap in a plan view is smaller than a second area where the gate electrode and the semiconductor layer overlap.

6 more elements

Dependencies are inferred from the claim text.

Semiconductor device

Life of this patent

Semiconductor device

Life of this patent

Abstract

Claims11