Lateral insulated gate turn-off device with induced emitter

A lateral insulated gate turn-off (IGTO) device formed as a die comprising:

• a first semiconductor layer of a first conductivity type;
• a well of a second conductivity type formed in the first semiconductor layer;
• a first region of the first conductivity type formed in the well and shallower than the well;
• a first electrode electrically contacting the first region;
• at least one trenched first gate extending along the first region and into the well, the first gate not extending outside of the well, the at least one trenched first gate being connected to a first gate electrode;
• a second region of the second conductivity type formed in the first semiconductor layer and laterally spaced from the well;
• a second electrode electrically contacting the second region;
• and
• at least one trenched second gate extending along the second region and into the first semiconductor layer, the at least one trenched second gate being connected to a second gate electrode;
• wherein a lateral structure of npn and pnp transistors is formed, and wherein the well forms a first base of one of the transistors,
• the well having dimensions and a dopant concentration such that, when a forward biasing voltage is applied between the first electrode and the second electrode and when a first turn-on voltage is applied to the first gate electrode, the at least one trenched first gate creates a first inversion layer in the well to turn on the IGTO device to conduct a lateral current between the first electrode and the second electrode, and
• wherein the at least one trenched second gate is configured so that when a second turn-on voltage, different from the first turn-on voltage, is applied to the second gate electrode, the at least one trenched second gate creates a second inversion layer in the first semiconductor layer that extends between the second region and the first semiconductor layer.